XC164CS Datasheet, PDF (62/71 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller

XC164
Derivatives
Timing Parameters
For a period of N × TCM the accumulated PLL jitter is defined by the deviation D_N:
D_N [ns] = ±(1.5 + 6.32 × N / f_MC); f_MC in [MHz], N = number of consecutive TCMs.
So, for a period of 3 TCMs @ 20 MHz and K = 12: D₃ = ±(1.5 + 6.32 × 3 / 20) = 2.448 ns.
This formula is applicable for K × N < 95. For longer periods the K× N=95 value can be
used. This steady value can be approximated by: D_Nmax [ns] = ±(1.5 + 600 / (K × f_MC)).
Acc. jitter D _N
ns
±8
K=15 K=12 K=10 K=8
K=6
K=5
±7
±6
±5
±4
±3
2400MMHzHz
±2
±1
01
5
10
15
20
25
N
m c b04413_x c .vs d
Figure 16 Approximated Accumulated PLL Jitter
Note: The bold lines indicate the minimum accumulated jitter which can be achieved by
selecting the maximum possible output prescaler factor K.
Different frequency bands can be selected for the VCO, so the operation of the PLL can
be adjusted to a wide range of input and output frequencies:
Table 15 VCO Bands for PLL Operation¹⁾
PLLCON.PLLVB VCO Frequency Range
Base Frequency Range
00
100 …150 MHz
20 …80 MHz
01
150 …200 MHz
40 …130 MHz
10
200 …250 MHz
60 …180 MHz
11
Reserved
1) _{Values guarnteed by design characterisation.}
Data Sheet
58
V2.1, 2003-06