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XC164CS Datasheet, PDF (27/71 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller
XC164
Derivatives
Functional Description
Table 4
XC164 Interrupt Nodes (cont’d)
Source of Interrupt or PEC
Service Request
Control
Register
Vector
Location1)
Trap
Number
CAPCOM6 Timer T13
CCU6_T13IC xx’0138H
4EH / 78D
CAPCOM6 Emergency
CCU6_EIC
xx’013CH
4FH / 79D
CAPCOM6
CCU6_IC
xx’0140H
50H / 80D
SSC1 Transmit
SSC1_TIC
xx’0144H
51H / 81D
SSC1 Receive
SSC1_RIC
xx’0148H
52H / 82D
SSC1 Error
SSC1_EIC
xx’014CH
53H / 83D
CAN0
CAN_0IC
xx’0150H
54H / 84D
CAN1
CAN_1IC
xx’0154H
55H / 85D
CAN2
CAN_2IC
xx’0158H
56H / 86D
CAN3
CAN_3IC
xx’015CH
57H / 87D
CAN4
CAN_4IC
xx’0164H
59H / 89D
CAN5
CAN_5IC
xx’0168H
5AH / 90D
CAN6
CAN_6IC
xx’016CH
5BH / 91D
CAN7
CAN_7IC
xx’0170H
5CH / 92D
RTC
RTC_IC
xx’0174H
5DH / 93D
Unassigned node
---
xx’0100H
40H / 64D
Unassigned node
---
xx’0104H
41H / 65D
Unassigned node
---
xx’012CH
4BH / 75D
Unassigned node
---
xx’00FCH
3FH / 63D
Unassigned node
---
xx’0160H
58H / 88D
1) Register VECSEG defines the segment where the vector table is located to.
Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table
represents the default setting, with a distance of 4 (two words) between two vectors.
2) The interrupt nodes assigned to ASC1 are only available in derivatives including the ASC1. Otherwise, they
are unassigned nodes.
Data Sheet
23
V2.1, 2003-06