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TLE8263-2E Datasheet, PDF (59/94 Pages) Infineon Technologies AG – Universal System Basis Chip
TLE8263-2E
Confidential
Supervision Functions
11.3
Electrical Characteristics
VS = 5.5 V to 28 V; Tj = -40 °C to +150 °C; SBC Normal Mode; all voltages with respect to ground; positive current
defined flowing into pin; unless otherwise specified.
Pos. Parameter
Symbol Limit Values
Unit Test Condition
Min. Typ. Max.
Reset Generator; Pin RO
11.3.1 Reset Threshold Voltage, VRT1,f 4.5
VRT1,r
4.6
VRT2,f
3.5
VRT2,r
3.6
VRT3,f
3.2
4.65 4.75 V
4.75 4.85 V
3.65 3,75 V
3.75 3,85 V
3.35 3.45 V
default setting, Vcc falling
default setting, Vcc rising
SPI option;Vcc falling
SPI option; Vcc rising
SPI option;VS ≥ 4 V; Vcc
falling
VRT3,r
3.3
11.3.2
Reset Threshold Voltage
Headroom
Reset Threshold
Hysteresis
VRT1_HR
VRT2_HR
VRT3_HR
VRT,hys
250
1.25
1.55
20
3.45
–
–
–
100
3.55 V
SPI option; VS ≥ 4 V, Vcc
rising
–
mV default setting1)
–
V
SPI option;1)
–
V
SPI option; VS ≥ 4 V 1)
200 mV -
11.3.3 Reset Low Output Voltage VRO
–
0.2
11.3.4 Reset High Output
VRO
Voltage
11.3.5 Reset Pull-up Resistor RRO
11.3.6 Reset Reaction Time
tRR
0.7 x –
VCC1µC
10
20
4
10
0.4
V
VCC1µC V
+ 0.3 V
40
kΩ
26
µs
IRO = 1 mA for
VCC1µC = VRT1/2/3;
IRO = 200 µA for
VRT1/2/3> VCC1µC ≥ 1 V
IRO = -20µA
VRO = 0 V
VCC1µC < VRT1/2
to RO = L
11.3.7 Reset Delay Time
tRD1
4.5
5.0
5.5
ms default SPI setting;
after Power-On-Reset
Watchdog Generator
11.3.8 Long Open Window
Internal Oscillator
tRD2
450 500
550 µs SPI setting option
tLW
–
256
–
ms 2)default setting
11.3.9 Internal Oscillator
tolerance
fCLKSBC -10
0
10
%
–
1) Headroom between actual output voltage on VCC1µC and Reset Threshold Voltage for falling Vcc.
2) Specified by design; not subject to production test. Tolerance defined by internal oscillator tolerance fCLKSBC.
Data Sheet
59
Rev. 1.0, 2009-03-31