HYB18T256324F-16 Datasheet, PDF(58/80 Page) Infineon Technologies AG – 256-Mbit GDDR3 DRAM [600MHz]

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HYB18T256324F-16 Datasheet, PDF (58/80 Pages) Infineon Technologies AG – 256-Mbit GDDR3 DRAM [600MHz]

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HYB18T256324Fâ[16/20/22]

256-Mbit DDR SGRAM

Functional Description

3.9.2 DTERDIS followed by Write

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Figure 42 DTERDIS Command followed by Write

1. Write shown with nominal value of tDQSS

2. WDQS can only transition when data is applied at the chip input and during pre- and postambles

3. The minimum distance between DTERDIS and Write is (CL -WL + 4) clocks.

Data Sheet

58

Rev. 1.11, 04-2005

10292004-DOXT-FS0U

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