HYB18T256324F-16 Datasheet, PDF(40/80 Page) Infineon Technologies AG – 256-Mbit GDDR3 DRAM [600MHz]

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HYB18T256324F-16 Datasheet, PDF (40/80 Pages) Infineon Technologies AG – 256-Mbit GDDR3 DRAM [600MHz]

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HYB18T256324Fâ[16/20/22]

256-Mbit DDR SGRAM

Functional Description

3.7.3.2 Bursts with Gaps

#, +

#,+

#O M

72

.$

!D DR "#X

.$

72

.$

"#Y

$% 3

$% 3

$% 3

$% 3

$% 3

$% 3

7$ 1 3

$1

7,

$X $X $X $X

$Y $Y $Y $Y

7$ 1 3

$1

7,

$X $X $X $X

$Y $Y $Y $Y

7$ 1 3

7,

$1

$X $X $X $X

$Y $Y $Y $Y

#O M#O M MAN D

!DD R! D DRE SS"#

7,7 RITE, ATE N CY

$% 3$E S ELE CT

.$ . / 0$ E SELEC T

$O N gT# A RE

"# X "A N K#O LUM NAD DRE SSX

"# Y "A N K#O LUM NAD DRE SSY

727 2)4 %

$X $A TA TO " # X

$Y $A TA TO " # Y

Figure 23 Consecutive Write Bursts with Gaps

1. Shown with nominal value of tDQSS.

2. The second WR command may be either for the same bank or another bank.

3. WDQS can only transition when data is applied at the chip input and during pre- and postambles.

Data Sheet

40

Rev. 1.11, 04-2005

10292004-DOXT-FS0U

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