TLE8209-2SA Datasheet, PDF (30/38 Pages) Infineon Technologies AG – SPI Programmable H-Bridge

9.2.5 Configuration Register
CONFIG_REG
Configuration Register
7
6
Reset Value: 1111 1010_B
5
4
3
2
MODE
MUX
SIN1
SIN2
CL1
CL2
TLE8209-2SA
SPI Interface
1
0
RESET
SL
Field
Bits
MODE
7
MUX
6
SIN1
5
SIN2
4
CL1
3
CL2
2
RESET
1
SL
0
Type
wr
wr
wr
wr
wr
wr
wr
wr
Description
’1’: H-bridge mode
’0’: single output stages (for current levels 1 to 3 only)
’1’: control by parallel inputs IN1 and IN2
’0’: control by SPI bits SIN1 and SIN2
control of OUT1 if MUX=’0’
control of OUT2 if MUX=’0’
current limitation level (see table below)
current limitation level (see table below)
’0’: reset of digital logic
slew rate setting
’1’: slow
’0’: fast
Table 9
CL1
0
0
1
1
Current Limitation Levels
CL2
Current Level
0
1
1
2
0
3 (default)
1
4
Typical Current
1.5A
4.0A
6.6A
8.6A
9.2.6 STATCON Register
STATCON_REG
STATCON Register
7
6
CONFIG2 CONFIG1
Reset Value: 1101 1xxx_B
5
4
3
2
CONFIG0 DIACLR2 DIACLR1 STATUS2
1
STATUS1
0
STATUS0
Field
Bits
CONFIG2 7
Type
wr
Description
VDD threshold test mode
’1’: VDD monitoring in normal operation
’0’: VDD thresholds are changed according to CONFIG1
Data Sheet
30
Rev. 1.0, 2010-02-16