TLE5011_11 Datasheet, PDF (27/45 Pages) Infineon Technologies AG – GMR Angle Sensor

TLE5011
Specification
Register Table
This section describes the complete address range as well as all registers of the TLE5011. It also defines the
read/write access rights of the specific registers. Table 16 identifies the values with symbols. Access to the
registers is accomplished via the SSC interface.
Table 16 Address Map
Addr. ^Name
Bits
7
6
5
4
3
00_H
CTRL1
-
-
-
-
SSC_
FILT
01_H
XL
02_H
XH
03_H
YL
04_H
YH
05_H
FCNT_
STAT
X_Low
X_High
Y_Low
Y_High
-
STAT_
VR
GMR_
OFF
UPDATE
06_H FSYNC_IN FILT_
V
INV
FSYNC
07_H
ANGT
-
ANGT_E
N
ANGT_Y
08_H
-
reserved
09_H
-
reserved
0A_H
-
reserved
0B_H
-
reserved
0C_H
TST
TEMP_E _ADCPY FILT_
FILT_
FILT_
N
PAR
CRS
BYP
0D_H
ID
DEV_ID
0E_H
LOCK
LOCK
0F_H
CRTL2 VDD_OV ^{VDD_ GND_OF VRG_}
VRA_
OFF
F
OV
OV
2
-
1
0
AUTO UR
FCNT
ANGT_X
TST_
TST_
ADC
GMR
reserved
TST_
CHAN
VRD_
OV
S_NO
Bit Types
The types of bits used in the registers are listed here:
Abbreviation
L
Function
Locked
U
Update
Description
Locked register.
Locked registers can be written only when the unlock-value is written
in the lock register (0E_H).
This ensures that these bits cannot be modified unintentionally
during normal operation.
Update buffer for this bit is present.
If an Update Command is issued and the Update-Mode bit (UR in
CTRL1) is set, the immediate values are stored in this Update Buffer
simultaneously.
This enables a snapshot of all necessary system parameters at the
same time.
Final Data Sheet
27
V2.0, 2011-03