TDA7210V_10 Datasheet, PDF (23/44 Pages) Infineon Technologies AG – ASK/FSK Single Conversion Receiver

TDA7210V
Applications
3.6
ASK/FSK Switch Functional Description
The TDA7210V is containing an ASK/FSK switch which can be controlled via Pin 14 (MSEL). This switch is
actually consisting of 2 operational amplifiers that are having a gain of 1 in case of the ASK amplifier and a gain
of 11 in case of the FSK amplifier in order to achieve an appropriate demodulation gain characteristic. In order to
compensate for the DC-offset generated especially in case of the FSK PLL demodulator there is a feedback
connection between the threshold voltage of the bit slicer comparator (Pin 19) to the negative input of the FSK
switch amplifier. This is shown in the following figure.
RSSI (ASK signal)
14 ^MSEL
FSK PLL Demodulator
0.2 mV/kHz
typ. 2 V
1.5 V......2.5 V
ASK/FSK Switch
Data Filter
-
+
ASK
+
-
FSK
R_{F3 int}
R_{F4 int}
300k
30k
ASK mode : v=1
FSK mode : v=11
R_{F1 int}
100k
R_{F2 int}
100k
v=1
FFB 22
20 OPP SLP 18
+
Comp
-
DATA Out
25
19 SLN
C₁₄
C₁₂
R₁
C₁₃
Figure 11 ASK/FSK Mode Datapath
3.6.1 FSK Mode
The FSK datapath has a bandpass characterisitc due to the feedback shown above (highpass) and the data filter
(lowpass). The lower cutoff frequency f2 is determined by the external RC-combination. The upper cutoff
frequency f3 is determined by the data filter bandwidth.
The demodulation gain of the FSK PLL demodulator is 200 µV/kHz. This gain is increased by the gain v of the FSK
switch, which is 11. Therefore the resulting dynamic gain of this circuit is 2.2 mV/kHz within the bandpass. The
gain for the DC content of FSK signal remains at 200 µV/kHz. The cutoff frequencies of the bandpass have to be
chosen such that the spectrum of the data signal is influenced in an acceptable amount.
In case that the user data is containing long sequences of logical zeroes the effect of the drift-off of the bit slicer
threshold voltage can be lowered if the offset voltage inherent at the negative input of the slicer comparator (Pin
19) is used. The comparator has no hysteresis built in.
This offset voltage is generated by the bias current of the negative input of the comparator (i.e. 20 nA) running
over the external resistor R1. This voltage raises the voltage appearing at pin 19 (e.g. 1 mV with R1 = 100 kΩ). In
order to obtain benefit of this asymmetrical offset for the demodulation of long zeros the lower of the two FSK
frequencies should be chosen in the transmitter as the zero-symbol frequency.
Data Sheet
23
Revision 1.1, 2010-06-18