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TDA7210V_10 Datasheet, PDF (18/44 Pages) Infineon Technologies AG – ASK/FSK Single Conversion Receiver
TDA7210V
Applications
3
2.5
2
RSSI Level
1.5
1
0.5
0
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
Input Level at LNA Input [dBm]
Figure 6 RSSI Level and Permissive AGC Threshold Levels
The switching point should be chosen according to the intended operating scenario. The determination of the
optimum point is described in the accompanying Application Note, a threshold voltage level of 1.8 V is apparently
a viable choice. It should be noted that the output of the 3VOUT pin is capable of driving up to 50 µA, but that the
THRES pin input current is only in the region of 40 nA. As the current drawn out of the 3VOUT pin is directly related
to the receiver power consumption, the power divider resistors should have high impedance values. The sum of
R1 and R2 has to be 600 kΩ in order to yield 3 V at the 3VOUT pin. R1 can thus be chosen as 240 kΩ, R2 as
360 kΩ to yield an overall 3VOUT output current of 5 µA1) and a threshold voltage of 1.8 V.
Note: If the LNA gain shall be kept in either high or low gain mode this has to be accomplished by tying the THRES
pin to a fixed voltage. In order to achieve always high gain mode operation, a voltage of at least 2.9 V or
higher shall be applied to the THRES pin, such as a short to the 3VOUT pin. In order to achieve low gain
mode operation a voltage lower than 0.7 V (depending on the matching and IF-filter) shall be applied to the
THRES, such as a short to ground.
As stated above the capacitor connected to the TAGC pin is generating the gain control voltage of the LNA due
to the charging and discharging currents of the OTA and thus is also responsible for the AGC time constant. As
the charging and discharging currents are not equal two different time constants will result. The time constant
corresponding to the charging process of the capacitor shall be chosen according to the data rate. According to
measurements performed at Infineon the capacitor value should be higher than 47 nF.
1) Note the 20 kΩ resistor in series with the 3.1 V internal voltage source
Data Sheet
18
Revision 1.1, 2010-06-18