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TC1797 Datasheet, PDF (185/190 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
TC1797
Electrical Parameters
5)Valid for output slopes of the Bus Driver of dRxSlope ≤ 5 ns, 20% × VDDP to
80% × VDDP, according to the FlexRay Electrical Physical Layer Specification V2.1 B. For
A1 pads, the rise and fall times of the incoming signal have to satisfy the following
inequality: -1.6 ns ≤ tF - tR ≤ 1.3 ns .
BSS
Byte Start
Sequence
TXD
tsample
TXD
t61
BSS
Byte Start
Sequence
RXD
tsample
Last CRC Byte
t60
Last CRC Byte
t63
RXD
t64
Figure 44 E-Ray Timing
FES
Frame End Sequence
0.7 VDDP
0.3 VDDP
0.9 VDDP
0.1 VDDP
t62
FES
Frame End Sequence
0.62 VDDP
0.36 VDDP
0.62 VDDP
0.36 VDDP
t65
E-RAY_TIMING_A1
Data Sheet
181
V1.1, 2009-04