TC1797 Datasheet, PDF (18/190 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1797
2.2.1 TC1797 Block Diagram
Figure 1 shows the block diagram of the TC1797.
EBU
PMI
2₃4₂ K_KB_B S_SP_PR_RA_AM_M
16 KB ICACHE
(8CKonBfigICuAraCbHleE)
FPU
TriCore
CPU
CPS
DMI
142K4B_LK_DBD_{RCLAADMCRHAEM}
(Co_Dn_Cfi_Agu_Cr_Hab_Ele)
Local Memory Bus (LMB)
BCU
PMU0
2 MB PFlash
64 KB DFlash
8 KB OVRAM
16 KB BROM
PMU1
1 MB PFlash ¹⁾
1 MB PFlash
1) The upper MB of the
PMU1 is available only
in the 4MByte derivative
Bridge
M
DMA
16 channels
M/S
System Peripheral Bus
(SPB)
ASC0
ASC1
E-Ray
(2 Channels)
GPTA0
16 KB PRAM
PCP2
Core
32 KB CMEM
PLL
SBCU
E-RAY
fE-Ray
PLL
fCPU
Interrupt
System
STM
SCU
Ports
SSC0
GPTA1
LTCA2
Ext.
Request
Unit
Multi
CAN
(4 Nodes,
128 MO)
MSC
0
(LVDS)
MSC
1
(LVDS)
SSC1
Figure 1 TC1797 Block Diagram
Introduction
Abbreviations:
ICACHE: Instruction Cache
DCACHE Data Cache
SPRAM: Scratch-Pad RAM
LDRAM: Local Data RAM
OVRAM: Overlay RAM
BROM: Boot ROM
PFlash: Program Flash
DFlash: Data Flash
PRAM: Parameter RAM in PCP
PCODE: Code RAM in PCP
1.5V, 3.3V
Ext. Supply
OCDS L1 Debug
Interface/JTAG
MLI0
MLI1
MemCheck
5V (3.3V supported as well)
Ext. ADC Supply
ADC0
16
ADC1
16
ADC2
16
FADC
3.3V
Ext. FADC Supply
BlockDiagram
TC1797
Data Sheet
14
V1.1, 2009-04