TLE4966V-1K_15 Datasheet, PDF (18/24 Pages) Infineon Technologies AG – In Plane Sensing with Vertical Dual Hall Effect Latch for Automotive Applications

TLE4966V-1K
Specification
3.5
Electro Magnetic Compatibility
Characterization of Electro Magnetic Compatibility is carried out on a sample basis from one qualification lot. Not
all specification parameters have been monitored during EMC exposure.
V_S
R_S = 100Ω
V_Q = 5V
R_Q=1.2kΩ
V_DD
Q₁
C_DD = 47nF
Q2
Figure 3-1 EMC test circuit
GND
TVS diodes
e.g. ESD24VS2U
Ref: ISO 7637-2 (Version 2004), test circuit Figure 3-1 (with external resistor, Rs = 100Ω)
Table 3-6 Magnetic Compatibility
Parameter
Symbol
Level / Type
Status
Testpulse 1
Testpulse 2a¹⁾
V_EMC
-90V
C
60V/110V
A/C
Testpulse 2b
10V
C
Testpulse 3a
-150V
A
Testpulse 3b
Testpulse 4²⁾
Testpulse 5b³⁾
100V
A
-7V / -5.5V
A
U_S = 86.5 V / U_S* = 28.5 V A
1) ISO 7637-2 (2004) describes internal resistance = 2Ω (former 10Ω).
2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V +/- 0.2 V.
3) A central load dump protection of 42 V is used. U_S* = 42 V-13.5V.
Ref: ISO 7637-2 (Version 2004), test circuit Figure 3-1 (without external resistor, R_S = 0Ω)
Table 3-7 Electro Magnetic Compatibility
Parameter
Symbol
Level / Type
Status
Testpulse 1
V_EMC
-50V
C
Testpulse 2a¹⁾
45V
A
Testpulse 2b
10V
C
Testpulse 3a
-150V
A
Testpulse 3b
Testpulse 4²⁾
Testpulse 5b³⁾
100V
A
-7V / 5.5 V
A
U_S = 86.5 V / U_S* = 28.5 V A
1) ISO 7637-2 (2004) describes internal resistance = 2Ω (former 10Ω).
2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V +/- 0.2 V.
3) A central load dump protection of 42 V is used. U_S* = 42 V-13.5V.
Data Sheet
18
Revision 1.0, 2014-05-13