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TLE4966V-1K_15 Datasheet, PDF (14/24 Pages) Infineon Technologies AG – In Plane Sensing with Vertical Dual Hall Effect Latch for Automotive Applications
3
Specification
TLE4966V-1K
Specification
3.1
Absolute Maximum Ratings
Table 3-1 Absolute Maximum Rating Parameters
Parameter
Symbol
Limit Values
Min.
Max.
Supply voltage
VDD
-18
32
42
Output voltage
VQ
Reverse output current
IQ
Junction temperature
TJ
-0.5
32
-35
-40
155
165
175
Storage temperature
Thermal resistance
Junction ambient
TS
RthJA
-40
150
200
Thermal resistance
RthJL
100
Junction lead
Unit Note / Test Condition
V
10h, no external resistor required
V
mA
°C for 2000h (not additive)
for 1000h (not additive)
for 168h (not additive)
°C
K/W for PG-TSOP6-6-5
K/W for PG-TSOP6-6-5
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
Calculation of the dissipated power PDIS and junction temperature TJ of the chip (TSPOP6 example):
e.g for: VDD = 12 V, IS = 10mA, VQSAT = 0.5 V, IQ = 10mA
Power dissipation: PDIS = 12 V x 10mA + 2 x (0.5 V x 10mA) = 120mW + 10mW = 130mW
Temperature ∆T = RthJA x PDIS = 200K/W x 130mW = 26K
For TA = 100°C: TJ = TA + ∆T = 100°C + 26K = 126°C
Table 3-2 ESD Protection1) (TA = 25°C)
Parameter
Symbol
Limit Values
Min.
Max.
ESD voltage (HBM)2)
VESD
-2
+2
System level test
-6
+6
1) Characterization of ESD is carried out on a sample basis.
2) Human Body Model (HBM) tests according to EIA/JESD22-A114
3) Gun test (2kΩ/330pF or 330Ω/150pF) according to ISO 10605-2008
Unit Note / Test Condition
kV R = 1.5kΩ, C = 100pF
kV
Figure 2-7 3)
Data Sheet
14
Revision 1.0, 2014-05-13