C161 Datasheet, PDF (17/400 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller

&3,
$UFKLWHFWXUDO 2YHUYLHZ
2
Architectural Overview
The architecture of the C161PI combines the advantages of both RISC and CISC
processors in a very well-balanced way. The sum of the features which are combined
result in a high performance microcontroller, which is the right choice not only for today’s
applications, but also for future engineering challenges. The C161PI not only integrates
a powerful CPU core and a set of peripheral units into one chip, but also connects the
units in a very efficient way. One of the four buses used concurrently on the C161PI is
the XBUS, an internal representation of the external bus interface. This bus provides a
standardized method of integrating application-specific peripherals to produce derivates
of the standard C161PI.
XRAM
XBUS Module
I²CXBRuAsMM/ oCdAuNle
ROM
Area
CPU
Core
Internal
RAM
OSC
Interrupt Controller
PEC
WDT
PORT0
Ext.
Bus
Ctrl
PORT1
GPT1
GPT2
SSC
ASC
Port 4
Port 6
Port 3
RTC
ADC
Port 5
Port 2
Figure 2-1 C161PI Functional Block Diagram
User’s Manual
2-1
1999-08