TLE7809G Datasheet, PDF (14/52 Pages) Infineon Technologies AG – Integrated double low-side switch, high-side/LED driver, hall supply, wake-up inputs and LIN communication with embedded MCU (16kB Flash)

TLE7809G
Operating Modes
4.5.3 SBC Stop Mode with Cyclic Wake
The SBC Stop Mode has the advantage of reducing the current consumption to a minimum, while supplying the
microcontroller with its quiescent current during its power saving mode (“Stop”). This mode is entered via SPI
command, and turns-off the integrated LIN bus transceiver, but the voltage regulator remains active.
The SBC periodically generates a wake-up “low” pulse at DO (“interconnect signal”) that is connected to an
interrupt input [P1.4] of the microcontroller. This period can be defined via the “cyclic wake period” bit field within
the SPI register. This pulse at DO has a length of two internal SBC cycles.
In case of a detected wake-up event via LIN message or any of the MONx pins, DO stays “low” until the first valid
SPI command.
Note: The window watchdog is automatically disabled once the LDO output current goes below a specified
“watchdog current threshold”, unless the SPI setting “WD On/Off” prevents this (see Figure 10).
Note: A wake-up event via LIN message or via MONx inputs can happen independently of the cyclic wake phase.
Note: The Window Watchdog starts with a “long open window” after a mode switch, e.g. to SBC Active Mode.
SBC Active Mode
MS2 MS1 MS0 Vcc
0
1 0 / 1 ON
SBC Standby Mode
Vcc
ON
Start Up
Power Up
„single“ µController SPI -Command:
- select „cyclic wake timing“ via SPI Timing Bits
- select SBC Stop Mode via SPI Mode Bits
- window watchdog activation / deactivation via SPI
[„off“ once current consumption below threshold ]
select SBC
operating
mode
STOP: Cyclic Wake
MS2 MS1 MS0 Vcc
1
1
1
ON
transition caused by: ²⁾
- event at MONx inputs:
=> DO „low“
- LIN message
=> RxD + DO „low“
[SPI indicates source]
cyclic wake-up
µC ¹⁾
µC wake-up inputs
NOTES:
1) _{window watchdog activated}
automatically once current
threshold is exceeded
2) _{wake-up via MONx inputs and}
LIN message independent of cyclic
wake phase („asynchronous“)
Figure 8 State Diagram “SBC Stop Mode with Cyclic Wake”
Data Sheet
14
Rev. 3.01, 2008-04-15