TLE9871QXA20_15 Datasheet, PDF (100/122 Pages) Infineon Technologies AG – Microcontroller with PWM Interface and BLDC MOSFET Driver for Automotive Applications

29.6
PWM Interface
TLE9871QXA20
Electrical Characteristics
29.6.1 Electrical Characteristics
Table 32 Electrical Characteristics PWM Interface
V_s = 5.5V to 18V, T_j = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note / Test Condition Number
Min. Typ. Max.
Bus Receiver Interface
Receiver threshold voltage, V_{th_dom} 0.4 ×V_S 0.45 ×V_S 0.53 x V_S V
recessive to dominant edge
SAE J2602
P_6.1.1
Receiver dominant state
V_BUSdom -27
–
0.4 ×V_S V
Receiver threshold voltage, V_{th_rec}
dominant to recessive edge
0.47 x 0.55 ×V_S 0.6 ×V_S V
V_S
Receiver recessive state V_BUSrec 0.6 ×V_S –
1.15 ×V_S V
Receiver center voltage
V_{BUS_CN} 0.475 0.5 ×V_S 0.525
V
T
× V_S
× V_S
Receiver hysteresis
V_HYS
0.07 V_S 0.12 ×V_S 0.175
V
× V_S
Wake-up threshold voltage V_BUS,wk 0.4 ×V_S 0.5 ×V_S 0.6 ×V_S V
Dominant time for bus wake- t_WK,bus 3
–
up (internal analog filter
15
µs
delay)
–
SAE J2602
P_6.1.2
P_6.1.3
1)
P_6.1.4
2)
P_6.1.5
3)
P_6.1.6
–
P_6.1.7
The overall dominant
time for bus wake-up is
a sum of t_WK,bus +
adjustable digital filter
time.
P_6.1.8
Bus Transmitter Interface
Bus recessive output
voltage
V_BUS,ro 0.8 ×V_S –
V_S
V V_TxD = high Level
P_6.1.9
Bus short circuit current
I_BUS,sc 40
Bus short circuit filter time t_BUS,sc –
100
150
1
–
mA Current Limitation for P_6.1.10
driver dominant state
driver on
V_BUS = 18 V;
µs The overall bus short P_6.1.71
circuit filter time is a sum
of t_BUS,sc + digital filter
time. The digital filter
time is 4 µs (typ.)
Leakage current (loss of
ground)
Leakage current
I_{BUS_NO_} -1000
GND
I_{BUS_NO_} –
BAT
-450
10
1000
20
µA V_S = 12 V; 0 < V_BUS < P_6.1.11
18 V;
µA V_S = 0 V; V_BUS = 18 V; P_6.1.12
Data Sheet
100
Rev. 1.0, 2015-04-30