1EDI30J12CP Datasheet, PDF (10/28 Pages) Infineon Technologies AG – 1EDI EiceDRIVER™ Enhanced

VCC1
IN
EN
V VCC1on
Output signals referenced to VCC2
VEE2
VVC C 1 o ff
EiceDRIVER™ Enhanced
1EDI30J12CP
Functional Description
BSEN
VREG
MDrv
VVR EGo n
V_{VR EGo ff}
JFDrv
tPDON
t PDOFF_EN
tPD OFF
t PDON_EN
Figure 4 Principle start up, auxiliary supplies present before a voltage is applied over the switch (Signal
names are chosen equivalent to the pin names of the driver)
3.2.3 Reverse start up with self-pinch-off
One of the biggest questions that arise when dealing with normally-on devices is the situation that comes up when
the auxiliary power supply fails or is not ready at the point when the high voltage is applied over the switch.
This event is depicted in Figure 5. Due to the normally-on behavior of the JFET and the cascoded normally-off
MOSFET, the voltage is being blocked at the MOSFET. The Vds voltage that is building up over the switched-off
MOSFET is being mirrored to the JFET Vgs voltage via the diode connecting the MOSFET drain to the JFET gate
(see Chapter 6.2) until the level reaches the JFET pinch off voltage and the JFET itself blocks the voltage.
When the JFET is pinched off a small current is still flowing through the JFET charging the capacitors CVEE2 and
CVReg which supply the driver. In this way the JFET acts as a linear regulator powering the output stages of the
driver at the pinch off voltage.
As soon as the auxiliary supply is larger than the pinch off voltage the auxiliary supply is charging VEE2. As it
reaches the under voltage lockout level, the JFET is kept off and the MOSFET is turned on. From this point
onwards the driver is transmitting the IN signal to the JFET gate.
This behavior of acting in a self-regulating manner enables the driver to also work in a bootstrapping scheme.
Preliminary Datasheet
9
Rev. 1.3, 2014-11-12