ICS9LPRS436CKILF Datasheet, PDF (8/20 Pages) Integrated Device Technology – Low Power Clock for Intel Atom®-Based Systems

ICS9LPRS436C
Low Power Clock for Intel Atom^®-Based Systems
Electrical Characteristics - Absolute Maximum Ratings
PARAMETER
SYMBOL
CONDITIONS
3.3V Core Supply Voltage
VDDA
3.3V Logic Supply Voltage
VDD
Input Low Voltage
V_IL
Input High Voltage
V_IH
Except for SMBus interface
Input High Voltage
V_IHSMB
SMBus clock and data pins
Storage Temperature
Ts
Case Temperature
Tcase
Input ESD protection
ESD prot
Human Body Model
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Operation under these conditions is neither implied nor guaranteed.}
MIN
GND-0.5
-65
2000
TYP
MAX UNITS NOTES
4.6
V
1,2
4.6
V
1,2
V
1
V_DD+0.5V V
1
5.5V
V
1
150
°_C
1
115
°C
1
V
1
Electrical Characteristics - Input/Supply/Common Output DC Parameters
PARAMETER
SYMBOL
CONDITIONS
Ambient Operating Temp
Supply Voltage
Input High Voltage
Input Low Voltage
T_ambC
T_ambI
VDDxxx
V_IHSE
V_ILSE
Standard Device
Industrial Temperature Range Device
Supply Voltage
Single-ended 3.3V inputs
Single-ended 3.3V inputs
MIN
0
-40
3.135
2
V_SS - 0.3
TYP
MAX UNITS
85
°C
85
°C
3.465
V
V_DD + 0.3 V
0.8
V
Notes
7
7
FS(4:3) Input High Voltage
V_{IH_FS4}
Single-ended 3.3V FS(4:3) Inputs
2
VDD + 0.3 V
FS(4:3) Input Low Voltage
Low Threshold Input-
High Voltage
V_{IL_FS4}
V_{IH_FS}
Single-ended 3.3V FS(4:3) Inputs
3.3 V +/-5%
V_SS - 0.3
0.7
0.8
V
VDD+0.3 V
Low Threshold Input-
Low Voltage
V_{IL_FS}
3.3 V +/-5%
V_SS - 0.3
0.35
V
Input Leakage Current
Input Leakage Current
I_IN
I_INRES
V_IN = V_{DD ,} V_IN = GND
Inputs with pull up or pull down resistors
V_IN = V_{DD ,} V_IN = GND
-5
-200
5
uA
6
200
uA
Output High Voltage
V_OHSE
Single-ended outputs, I_OH = -1mA
2.4
V
5
Output Low Voltage
V_OLSE
Single-ended outputs, I_OL = 1 mA
0.4
V
5
Operating Supply Current
I_DDVDD3.3
I_DDVDDSUSP3.3
Full Active, C_L = Full load; IDD 3.3V
Full Active, C_L = Full load; IDD 3.3V
100
mA
13
mA
Powerdown Current
I_DDPDVDD3.3
I_DDPDSUSP3.3w
3.3V Main Rail
VDD_SUSP Rail. 25MHz Running (WOL)
0
mA
13
mA
I_DDPDSUSP3.3
VDD_SUSP Rail. 25MHz Off
2
mA
Input Frequency
F_i
V_DD = 3.3 V
27
MHz
8
Pin Inductance
L_pin
7
nH
Input Capacitance
C_IN
C_OUT
Logic Inputs
1.5
Output pin capacitance
5
pF
6
pF
C_INX
X1 & X2 pins
6
pF
SMBus Voltage
V_DD
2.7
5.5
V
Low-level Output Voltage
Current sinking at
V_OLSMB = 0.4 V
SCLK/SDATA
Clock/Data Rise Time
V_OLSMB
I_PULLUP
T_RI2C
@ I_PULLUP
SMB Data Pin
(Max VIL - 0.15) to
(Min VIH + 0.15)
0.4
V
4
mA
1000
ns
SCLK/SDATA
Clock/Data Fall Time
T_FI2C
(Min VIH + 0.15) to
(Max VIL - 0.15)
300
ns
Maximum SMBus Operating Frequency
F_SMBUS
100
kHz
Spread Spectrum Modulation Frequency
f_SSMOD
Triangular Modulation
30
33
kHz
NOTES on DC Parameters: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production).
1 _{Operation at these points is not recommended}
2 _{Maximum VIH is not to exceed VDD}
3 _{Human Body Model}
4 _{Operation under these conditions is neither implied, nor guaranteed.}
5_{Signal is required to be monotonic in this region.}
6 _{Input leakage current does not include inputs with pull-up or pull-down resistors}
7 _{3.3V referenced inputs are: PCI&PCIEX_STOP#, CPU_STOP#, ITP_EN, SCLK, SDATA, VTT_PWR_GD/PD#, SEL12_48# and PEREQ# inputs if selected.}
8 _{For margining purposes only. Normal operation should have Fin = 25MHz +/-50ppm}
IDT^® Low Power Clock for Intel Atom^®-Based Systems
8
1561A — 06/01/10