ICS9LPRS436CKILF Datasheet, PDF (10/20 Pages) Integrated Device Technology – Low Power Clock for Intel Atom®-Based Systems

ICS9LPRS436C
Low Power Clock for Intel Atom^®-Based Systems
Electrical Characteristics - USB48MHz, 12/48MHz
PARAMETER
SYMBOL
Long Accuracy
ppm
Clock period
T_period
Absolute min/max period
T_abs
Output High Voltage
V_OH
Output Low Voltage
V_OL
Rising Edge Slew Rate (USB48M)
t_SLR
Falling Edge Slew Rate (USB48M)
t_FLR
Rising Edge Slew Rate (12/48M)
t_SLR
Falling Edge Slew Rate (12/48M)
t_FLR
Duty Cycle
d_t1
Jitter, Cycle to cycle
t_jcyc-cyc
Electrical Characteristics - 25MHz
PARAMETER
Long Accuracy
Clock period
Absolute min/max period
Output High Voltage
Output Low Voltage
Rising Edge Slew Rate
Falling Edge Slew Rate
Duty Cycle
Jitter, Cycle to cycle
SYMBOL
ppm
T_period
T_abs
V_OH
V_OL
t_SLR
t_FLR
d_t1
t_jcyc-cyc
CONDITIONS
see Tperiod min-max values
48.00MHz output nominal
48.00MHz output nominal
I_OH = -1 mA
I_OL = 1 mA
Measured from 0.8 to 2.0 V
Measured from 2.0 to 0.8 V
Measured from 0.8 to 2.0 V
Measured from 2.0 to 0.8 V
V_T = 1.5 V
V_T = 1.5 V
CONDITIONS
see Tperiod min-max values
25.00MHz output nominal
25.00MHz output nominal
I_OH = -1 mA
I_OL = 1 mA
Measured from 0.8 to 2.0 V
Measured from 2.0 to 0.8 V
V_T = 1.5 V
V_T = 1.5 V
Electrical Characteristics - 12.288MHz
PARAMETER
SYMBOL
Long Accuracy
ppm
Clock period
T_period
Absolute min/max period
T_abs
Output High Voltage
V_OH
Output Low Voltage
V_OL
Rising Edge Slew Rate
t_SLR
Falling Edge Slew Rate
t_FLR
Duty Cycle
d_t1
Jitter, Cycle to cycle
t_jcyc-cyc
CONDITIONS
see Tperiod min-max values
12.288MHz output nominal
12.288MHz output nominal
I_OH = -1 mA
I_OL = 1 mA
Measured from 0.8 to 2.0 V
Measured from 2.0 to 0.8 V
V_T = 1.5 V
V_T = 1.5 V
Electrical Characteristics - REF-14.318MHz
PARAMETER
SYMBOL
CONDITIONS
Long Accuracy
ppm
see Tperiod min-max values
Clock period
Tperiod
14.318MHz output nominal
Absolute min/max period
Tabs
14.318MHz output nominal
Output High Voltage
VOH
IOH = -1 mA
Output Low Voltage
VOL
IOL = 1 mA
Rising Edge Slew Rate
tSLR
Measured from 0.8 to 2.0 V
Falling Edge Slew Rate
tFLR
Measured from 2.0 to 0.8 V
Duty Cycle
dt1
VT = 1.5 V
Jitter, Cycle to cycle
tjcyc-cyc
*T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L=5pF, Rs=22Ω (unless specified otherwise)
1 _{Guaranteed by design and characterization, not 100% tested in production.}
VT = 1.5 V
2 _{All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz}
3 _{The average period over any 1us period of time}
MIN
-100
20.83125
20.48125
2.4
TYP
1
1
1
1
45
MAX UNITS NOTES
100 ppm 1,2
20.83542 ns
2,3
21.18542 ns
2
V
1
0.4
V
1
2
V/ns 1
2
V/ns 1
4
V/ns 1
4
V/ns 1
55
%
1
350
ps
1
MIN TYP
-100
39.99600
39.32360
2.4
1
1
45
MAX UNITS NOTES
100 ppm 1,2
40.00400 ns
2,3
40.67640 ns
2
V
1
0.4
V
1
2
V/ns
1
2
V/ns
1
55
%
1
500
ps
1
MIN TYP
-100
81.37207
80.87207
2.4
1
1
45
MAX UNITS NOTES
100 ppm 1,2
81.38835 ns
2,3
81.88835 ns
2
V
1
0.4
V
1
2
V/ns
1
2
V/ns
1
55
%
1
500
ps
1
MIN TYP
-100
69.82033
69.83400
2.4
1
1
45
MAX UNITS
100 ppm
69.86224 ns
70.84800 ns
V
0.4
V
4
V/ns
4
V/ns
55
%
1000
ps
Notes
1,2
2,3
2
1
1
1
1
1
1
IDT^® Low Power Clock for Intel Atom^®-Based Systems
10
1561A — 06/01/10