ICS9LPRS436CKILF Datasheet, PDF (20/20 Pages) Integrated Device Technology – Low Power Clock for Intel Atom®-Based Systems

ICS9LPRS436C
Low Power Clock for Intel Atom^®-Based Systems
R evision H istory
Rev. Issue Date
0.1 12/14/2009
0.2 12/18/2009
0.3 1/18/2010
0.4
6/1/2010
A
6/1/2010
Requestor
RDW
RDW
RDW
RDW
RDW
Description
Initial Releas e of C rev with updated Frequenc y Select Table and Updated Idd s pecs for
Suspend State. 48 MLF pinout also added.
Corrected IDDPDVDD3.3 parameter to be 0 mA
Updated block diagram
Corrected SMBus as follows:
1. Byte0, bits (4:0) are Read/Write not Read only
2. Byte 6 is as follows: b(7:6) c ontrol PCIe(2:0), b(5:4) control DOT96, b(3:2) control
PCIe3/SATA, b(1:0) control CPU.
3. Added '0010 = C rev ' to Byte 7 desc ription for C rev.
4. Updated Absolute Max ratings to indicate max SMBus Vhigh is 5.5V.
5. Removed IOH and IOL s pecific ations from Single Ended output Electrical
Characteristic s tables. These values are indirectly determined by the Output Termination
Table.
6. Typic al column added to Electrical Characteristics Tables.
7. General Description updated.
8. References to I2C clarified to refer to SMBus
9. Minor formatting updated to SMBus Bytes 23, and 25.
Released to Final
Page #
-
5
5, 8-11,
13,14
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