ICS9LPRS436CKILF Datasheet, PDF (13/20 Pages) Integrated Device Technology – Low Power Clock for Intel Atom®-Based Systems

ICS9LPRS436C
Low Power Clock for Intel Atom^®-Based Systems
SMBus Table: Frequency Select Register
Byte 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
Spread Enable
FS4
FS3
FSLC
FSLB
FSLA
Control Function
Enables Spread for
CPU/SRC/PCI outputs
Freq Select Bit 4
Freq Select Bit 3
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
Type
RW
RW
RW
RW
RW
RW
0
1
PWD
0
0
Off
0.5% down spread 0
See Table 1: CPU/SRC/PCI PLL
Frequency Selection Table
Latch
Latch
Latch
Latch
Latch
SMBus Table: Output Control Register
Byte 1
Name
Control Function
Type
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
DOT96Mhz
SATA/PCIe3
ITP/PCIe2
PCIe1
PCIe0
Output Enable
RW
Output Enable
RW
Output Enable
RW
Output Enable
RW
Output Enable
RW
Output Enable (Disabling This
Bit 2
12.288MHz
output also disables the
RW
12.288M PLL).
25MHz free running during VDD
Suspend (S-states). If this bit is
Bit 1
25MHz
set to 0, the XTAL OSC will also RW
be powered down in the
Suspend States)
Bit 0
CPU PLL MN_EN
CPU PLL M/N Enable
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Does Not Run
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
Runs
1
Enable
0
SMBus Table: Output Control Register
Byte 2
Bit 7
Name
USB_48MHz
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
REF0
25MHz
12_48MHz
PCICLK_F0
PCICLK0
Bit 0
Control Function
Type
Output Enable
RW
Reserved
Output Enable
RW
Output Enable
RW
Output Enable
RW
Output Enable
RW
Output Enable
RW
Reserved
0
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
0
1
1
1
1
1
0
SMBus Table: Output Control Register
Byte 3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
CPUCLK1
CPUCLK0
PEREQ3# Control
PEREQ3# Control
PEREQ2# Control
PEREQ2# Control
PEREQ1# Control
PEREQ1# Control
Control Function
Output Enable
Output Enable
PCIEX1 is controlled
PCIEX2 is controlled
PCIEX1 is controlled
SATACLK is controlled
PCIEX0 is controlled
SATACLK is controlled
Type
RW
RW
RW
RW
RW
RW
RW
RW
NOTE: Only 1 PEREQ at a time can be selected to control an output.
IDT^® Low Power Clock for Intel Atom^®-Based Systems
0
Disable
Disable
Not Controlled
Not Controlled
Not Controlled
Not Controlled
Not Controlled
Not Controlled
1
Enable
Enable
Controlled
Controlled
Controlled
Controlled
Controlled
Controlled
PWD
1
1
0
0
0
0
0
0
1561A — 06/01/10
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