ICS9DS400 Datasheet, PDF (8/19 Pages) Integrated Device Technology – Four Output Differential Buffer for PCIe Gen 2 with Spread

ICS9DS400
Four Output Differential Buffer for PCIe for Gen 2 with Spread
Advance Information
Clock Periods Differential Outputs with Spread Spectrum Enabled
Measurement
Window
1 Clock
1us
0.1s
0.1s
0.1s
1us
Symbol
Lg-
-SSC -ppm error 0ppm + ppm error +SSC
Definition
Absolute
Period
Minimum
Short-term Long-Term
Average Average
Minimum Minimum
Period
Long-Term Short-term
Average Average
Absolute Absolute Absolute Nominal Maximum Maximum
Period
Period
Period
DIF 100 9.87400 9.99900 9.99900 10.00000 10.00100 10.05130
DIF 133 7.41425 7.49925 7.49925 7.50000 7.50075 7.53845
DIF 166 5.91440 5.99940 5.99940 6.00000 6.00060 6.03076
DIF 200 4.91450 4.99950 4.99950 5.00000 5.00050 5.02563
DIF 266 3.66463 3.74963 3.74963 3.75000 3.75038 3.76922
DIF 333 2.91470 2.99970 2.99970 3.00000 3.00030 3.01538
DIF 400 2.41475 2.49975 2.49975 2.50000 2.50025 2.51282
1 Clock
Lg+
Period
Maximum
10.17630
7.62345
6.11576
5.11063
3.85422
3.10038
2.59782
Units Notes
ns 1,2,3
ns 1,2,4
ns 1,2,4
ns 1,2,4
ns 1,2,4
ns 1,2,4
ns 1,2,4
Clock Periods Differential Outputs with Spread Spectrum Disabled
Measurement
Window
1 Clock
1us
0.1s
0.1s
0.1s
Symbol
Lg-
-SSC -ppm error 0ppm + ppm error
Absolute Short-term Long-Term
Period Average Average
Period
Long-Term
Average
Definition
Minimum Minimum Minimum
Absolute Absolute Absolute Nominal Maximum
Period
Period
Period
DIF 100 9.87400
9.99900 10.00000 10.00100
DIF 133 7.41425
7.49925 7.50000 7.50075
DIF 166 5.91440
5.99940 6.00000 6.00060
DIF 200 4.91450
4.99950 5.00000 5.00050
DIF 266 3.66463
3.74963 3.75000 3.75038
DIF 333 2.91470
2.99970 3.00000 3.00030
DIF 400 2.41475
2.49975 2.50000 2.50025
1_{Guaranteed by design and characterization, not 100% tested in production.}
1us
+SSC
Short-term
Average
Maximum
1 Clock
Lg+
Period
Maximum
10.17630
7.62345
6.11576
5.11063
3.85422
3.10038
2.59782
Units Notes
ns 1,2,3
ns 1,2,4
ns 1,2,4
ns 1,2,4
ns 1,2,4
ns 1,2,4
ns 1,2,4
2 _{All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with}
CK409/CK410B/CK505 accuracy requirements. The 9DS400/800 itself does not contribute to ppm error.
3 _{Driven by SRC output of main clock, PLL or Bypass mode}
4 _{Driven by CPU output of CK410B/CK505 main clock, Bypass mode only}
IDT^TM/ICS^TM Four Output Differential Buffer for PCIe Gen 2 with Spread
8
1626 09/17/09