ICS9DS400 Datasheet, PDF (2/19 Pages) Integrated Device Technology – Four Output Differential Buffer for PCIe Gen 2 with Spread

ICS9DS400
Four Output Differential Buffer for PCIe for Gen 2 with Spread
Advance Information
Pin Configuration
VDD 1
SRC_IN 2
SRC_IN# 3
GND 4
VDD 5
DIF_1 6
DIF_1# 7
OE_1 8
DIF_2 9
DIF_2# 10
VDD 11
BYPASS#_SSCG 12
SCLK 13
SDATA 14
28 VDDA
27 GNDA
26 IREF
25 OE_INV
24 VDD
23 DIF_6
22 DIF_6#
21 OE_6
20 DIF_5
19 DIF_5#
18 VDD
17 SPREAD_EN
16 DIF_STOP#
15 PD#
OE_INV = 0
See Pin Description Table for pins w/internal pull up or pull down
VDD 1
SRC_IN 2
SRC_IN# 3
GND 4
VDD 5
DIF_1 6
DIF_1# 7
OE1# 8
DIF_2 9
DIF_2# 10
VDD 11
BYPASS#_SSCG 12
SCLK 13
SDATA 14
28 VDDA
27 GNDA
26 IREF
25 OE_INV
24 VDD
23 DIF_6
22 DIF_6#
21 OE6#
20 DIF_5
19 DIF_5#
18 VDD
17 SPREAD_EN
16 DIF_STOP
15 PD
OE_INV = 1
See Pin Description Table for pins w/internal pull up or pull down
Power Groups
Pin Number
VDD
GND
1
4
5,11,18, 24
4
N/A
27
28
27
Description
SRC_IN/SRC_IN#
DIF(1,2,5,6)
IREF
Analog VDD &
GND for PLL core
IDT^TM/ICS^TM Four Output Differential Buffer for PCIe Gen 2 with Spread
2
1626 09/17/09