ICS8402015I Datasheet, PDF (8/19 Pages) Integrated Device Technology – FemtoClock™ Crystal-to-LVDS/LVCMOS Frequency

ICS8402015I Datasheet
Parameter Measurement Information
FEMTOCLOCK™ CRYSTAL-TO-LVDS/LVCMOS FREQUENCY SYNTHESIZER
3.3V±5%
POWER SUPPLY
+ Float GND –
V_DD,
V_{DDO_C}
LVDV_DS_DA
SCOPE
Qx
nQx
1.65V±5%
1.65V±5%
V_DD,
V_{DDO_A,}
V_{DDOL_VB CMOVDSDA}
GND
SCOPE
Qx
3.3V LVDS Output Load AC Test Circuit
-1.65V±5%
3.3V LVCMOS Output Load AC Test Circuit
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS Phase Jitter
nQC[0:2]
Qx[0:2]
nQC[0:2]
Qx[0:2]
t sk(b)
Where X = Bank A, Bank B or Bank C outputs
Bank Skew
QA[0:2],
QB[0:2]
t _PW
V
DDO_CMOS
2
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Single-Ended Output Duty Cycle/Pulse Width/Period
nQC{0:2]
QC{0:2]
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Differential Output Duty Cycle/Pulse Width/Period
ICS8402015AKI REVISION A JUNE 25, 2009
8
©2009 Integrated Device Technology, Inc.