ICS8402015I Datasheet, PDF (3/19 Pages) Integrated Device Technology – FemtoClock™ Crystal-to-LVDS/LVCMOS Frequency

ICS8402015I Datasheet
FEMTOCLOCK™ CRYSTAL-TO-LVDS/LVCMOS FREQUENCY SYNTHESIZER
Table 1. Pin Descriptions
Number
1
2
3, 4, 13, 16,
25, 32
Name
V_{DDO_REF}
REF_OUT
GND
Type
Power
Output
Power
Description
Output supply pin for REF_OUT output.
Reference clock output. LVCMOS/LVTTL interface levels.
Power supply ground.
5, 6, 7
8
9
10, 11, 12
QA0, QA1, QA2
V_{DDO_A}
V_{DDO_B}
QB0, QB1, QB2
Output
Power
Power
Output
Single-ended Bank A clock outputs.LVCMOS/LVTTL interface levels.
Power output supply pin for Bank A LVCMOS outputs.
Power output supply pin for Bank B LVCMOS outputs.
Single-ended Bank B clock outputs.LVCMOS/LVTTL interface levels.
14
15
17, 24
18, 19
20, 21
22, 23
26
27, 29
28
30, 31
MR
V_DD
V_{DDO_C}
QC0, nQC0
QC1, nQC1
QC2, nQC2
V_DDA
OE0, OE2
OE1
XTAL_IN,
XTAL_OUT
Input
Power
Power
Output
Output
Output
Power
Input
Input
Master reset, resets the internal dividers. During reset, LVCMOS outputs are pulled
Pulldown LOW, and LVDS outputs are pulled LOW and HIGH (QCx pulled LOW, nQCx
pulled HIGH). LVCMOS/LVTTL interface levels.
Core supply pin.
Power output supply pin for Bank C LVDS outputs.
Differential Bank C clock outputs. LVDS interface levels.
Differential Bank C clock outputs. LVDS interface levels.
Differential Bank C clock outputs. LVDS interface levels.
Analog supply pin.
Pulldown
Output enable and configuration pins. See Table 3.
LVCMOS/LVTTL interface levels.
Pullup
Output enable and configuration pin. See Table 3.
LVCMOS/LVTTL interface levels.
Input
Crystal oscillator interface. XTAL_OUT is the output, XTAL_IN is the input.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
C_IN
Input Capacitance
C_PD
Power Dissipation
Capacitance (per output)
R_PULLUP
Input Pullup Resistor
R_PULLDOWN Input Pulldown Resistor
R_OUT
Output
Impedance
QA[0:2],
QB[0:2],
REF_OUT
Test Conditions
V_DD, V_{DDO_A,} V_{DDO_B,} V_{DDO_C} = 3.465V
Minimum
Typical
4
Maximum
Units
pF
15
pF
51
kΩ
51
kΩ
20
Ω
ICS8402015AKI REVISION A JUNE 25, 2009
3
©2009 Integrated Device Technology, Inc.