83905 Datasheet, PDF (8/21 Pages) Integrated Device Technology – Low Skew, 1:6 Crystal-to-LVCMOS/ LVTTL Fanout Buffer

83905 Datasheet
Table 6E. AC Characteristics, V_DD = 3.3V ± 5%, V_DDO = 1.8V ± 0.2V, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
Using External Crystal
10
f_MAX
Output Frequency _{Using External Clock}
Source NOTE 1
DC
tsk(o) Output Skew; NOTE 2, 3
tjit
RMS Phase Jitter (Random)
25MHz, Integration Range:
100Hz – 1MHz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
48
t_EN
Output Enable
Time; NOTE 4
ENABLE1
ENABLE2
t_DIS
Output Disable
Time; NOTE 4
ENABLE1
ENABLE2
Typical
0.18
Maximum
40
Units
MHz
100
MHz
80
ps
ps
900
ps
52
%
4
cycles
4
cycles
4
cycles
4
cycles
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at ƒ  f_MAX using a crystal input unless noted otherwise.
Terminated at 50 to V_DDO/2.
NOTE 1: XTAL_IN can be overdriven by a single-ended LVCMOS signal. Please refer to Application Information section.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V_DDO/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
Table 6F. AC Characteristics, V_DD = 2.5V ± 5%, V_DDO = 1.8V ± 0.2V, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
Using External Crystal
10
f_MAX
Output Frequency _{Using External Clock}
Source NOTE 1
DC
tsk(o) Output Skew; NOTE 2, 3
tjit
RMS Phase Jitter (Random)
25MHz, Integration Range:
100Hz – 1MHz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
47
t_EN
Output Enable
Time; NOTE 4
ENABLE1
ENABLE2
t_DIS
Output Disable
Time; NOTE 4
ENABLE1
ENABLE2
Typical
0.19
Maximum Units
40
MHz
100
MHz
80
ps
ps
900
ps
53
%
4
cycles
4
cycles
4
cycles
4
cycles
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at ƒ  f_MAX using a crystal input unless noted otherwise.
Terminated at 50 to V_DDO/2.
NOTE 1: XTAL_IN can be overdriven by a single-ended LVCMOS signal. Please refer to Application Information section.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V_DDO/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
©2016 Integrated Device Technology, Inc.
8
Revision D September 27, 2016