83905 Datasheet, PDF (5/21 Pages) Integrated Device Technology – Low Skew, 1:6 Crystal-to-LVCMOS/ LVTTL Fanout Buffer

83905 Datasheet
Table 4G. LVCMOS/LVTTL DC Characteristics, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum Units
V_IH
Input
ENABLE1,
High Voltage ENABLE2
V_DD = 3.3V ± 5%
V_DD = 2.5V ± 5%
V_DD = 1.8V ± 0.2V
2
1.7
0.65 * V_DD
V_DD = 3.3V ± 5%
-0.3
V_IL
Input
ENABLE1,
Low Voltage ENABLE2
V_DD = 2.5V ± 5%
-0.3
V_DD = 1.8V ± 0.2V
-0.3
V_DDO = 3.3V ± 5%; NOTE 1
2.6
V_OH
Output High Voltage
V_DDO = 2.5V ± 5%; I_OH = -1mA
2.0
V_DDO = 2.5V ± 5%; NOTE 1
1.8
V_DDO = 1.8V ± 0.2V; NOTE 1
V_DDO - 0.3
V_DDO = 3.3V ± 5%; NOTE 1
V_DDO = 2.5V ± 5%; I_OL = 1mA
V_OL
Output Low Voltage; NOTE 1
V_DDO = 2.5V ± 5%; NOTE 1
V_DDO = 1.8V ± 0.2V; NOTE 1
V_DD + 0.3
V
V_DD + 0.3
V
V_DD + 0.3
V
0.8
V
0.7
V
0.35 * V_DD
V
V
V
V
V
0.5
V
0.4
V
0.45
V
0.35
V
NOTE 1: Outputs terminated with 50 to V_DDO/2. See Parameter Measurement Information, Output Load Test Circuit diagrams.
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
Minimum
10
Typical
Fundamental
Maximum
40
50
7
1
Units
MHz

pF
mW
©2016 Integrated Device Technology, Inc.
5
Revision D September 27, 2016