83905 Datasheet, PDF (2/21 Pages) Integrated Device Technology – Low Skew, 1:6 Crystal-to-LVCMOS/ LVTTL Fanout Buffer

83905 Datasheet
Pin Descriptions and Characteristics
Table 1. Pin Descriptions
Name
XTAL_OUT
XTAL_IN
ENABLE1, ENABLE2
BCLK0, BCLK1, BCLK2,
BCLK3, BCLK4, BCLK5
GND
V_DD
V_DDO
nc
Type
Output
Input
Input
Output
Power
Power
Power
Unused
Description
Crystal oscillator interface. XTAL_OUT is the output.
Crystal oscillator interface. XTAL_IN is the input.
Clock enable. LVCMOS/LVTTL interface levels. See Table 3.
Clock outputs. LVCMOS/LVTTL interface levels.
Power supply ground.
Power supply pin.
Output supply pin.
No connect.
Table 2. Pin Characteristics
Symbol Parameter
C_IN
Input Capacitance
Power Dissipation
C_PD
Capacitance
(per output)
R_OUT
Output Impedance
Test Conditions
V_DDO = 3.465V
V_DDO = 2.625V
V_DDO = 2.0V
V_DDO = 3.3V ± 5%
V_DDO = 2.5V ± 5%
V_DDO = 1.8V ± 0.2V
Function Table
Table 3. Clock Enable Function Table
Control Inputs
Outputs
ENABLE 1 ENABLE2 BCLK[0:4]
BCLK5
0
0
LOW
LOW
0
1
LOW
Toggling
1
0
Toggling
LOW
1
1
Toggling
Toggling
Minimum
Typical
4
7
7
10
Maximum
19
18
16
Units
pF
pF
pF
pF



BCLK5
BCLK[0:4]
ENABLE2
ENABLE1
Figure 1. Enable Timing Diagram
©2016 Integrated Device Technology, Inc.
2
Revision D September 27, 2016