ICS841N254I Datasheet, PDF (6/23 Pages) Integrated Device Technology – FEMTOCLOCK® NG Crystal-to-LVDS/HCSL Clock Synthesizer

ICS841N254I Data Sheet
FEMTOCLOCK® NG CRYSTAL-TO-LVDS/HCSL CLOCK SYNTHESIZER
Table 6. AC Characteristics, V_DD = V_DDOA = V_DDOB = 3.3V±5% or 2.5V±5%, T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical
F_SEL [1:0] = 00
156.25
f_OUT
Output Frequency
F_SEL [1:0] = 01
125
F_SEL [1:0] = 10
100
F_SEL [1:0] = 11
250
f_REF
Reference Frequency
REF_CLK
25
156.25MHz, Integration Range:
1MHz – 20MHz
0.27
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 1
156.25MHz, Integration Range:
12kHz – 20MHz
125MHz, Integration Range:
1MHz – 20MHz
0.32
0.33
125MHz,Integration Range:
12kHz – 20MHz
0.37
156.25MHz, Offset: 100Hz
-91.6
Φ_N
Single-Side Band Noise Power
156.25MHz, Offset: 1kHz
156.25MHz, Offset: 10kHz
-120.8
-132.2
156.25MHz, Offset: 100kHz
-135.0
PSNR
Power Supply Noise Rejection
From DC to 50MHz
-50
tsk(o)
Output Skew
NOTE 2, 3, 4 Between QAx/nQAx & QBx/nQBx
1.8
tsk(b)
Bank Skew
NOTE 2, 4, 5
t_R / t_F
Output Rise/Fall
Time
QAx, nQAx
20% to 80%
100
t_LOCK
V_RB
PLL Lock Time
Ring-back Voltage
Margin; NOTE 6, 7
QBx, nQBx
-100
t_STABLE
Time before V_RB is
Allowed; NOTE 6, 7
QBx, nQBx
500
V_MAX
Absolute Maximum
Output Voltage;
NOTE 8, 9
QBx, nQBx
V_MIN
Absolute Minimum
Output Voltage;
NOTE 8, 10
QBx, nQBx
-300
Absolute Crossing
V_CROSS Voltage;
QBx, nQBx
100
NOTE 8, 11, 12
∆V_CROSS
Total Variation of
V_CROSS over all
edges;
NOTE 8, 11, 13
QBx, nQBx
Rise/Fall Edge Rate;
NOTE 6, 14
QBx, nQBx
Measured between
-150mV to 150mV
0.6
odc
Output Duty Cycle;
NOTE 15
QBx, nQBx
47
Output Duty Cycle QAx, nQAx
47
Maximum
2.7
55
400
20
100
1150
350
140
5.5
53
53
Units
MHz
MHz
MHz
MHz
MHz
ps
ps
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dB
ns
ps
ps
ms
mV
ps
mV
mV
mV
mV
V/ns
%
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTES continued on next page.
ICS841N254AKI REVISION A APRIL 18, 2011
6
©2011 Integrated Device Technology, Inc.