ICS841N254I Datasheet, PDF (14/23 Pages) Integrated Device Technology – FEMTOCLOCK® NG Crystal-to-LVDS/HCSL Clock Synthesizer

ICS841N254I Data Sheet
FEMTOCLOCK® NG CRYSTAL-TO-LVDS/HCSL CLOCK SYNTHESIZER
HCSL Recommended Termination
Figure 3A is the recommended source termination for applications
where the driver and receiver will be on a separate PCBs. This
termination is the standard for PCI Express™ and HCSL output
types. All traces should be 50Ω impedance single-ended or 100Ω
differential.
0.5" Max
L1
Rs
22 to 33 +/-5%
0-0.2"
L2
L1
PCI Express
D ri ve r
L2
0-0.2" L3 L3
1-14"
L4
L4
PCI Expres s
C o n n e cto r
0.5 - 3.5"
L5
L5
PCI Express
Add-in Card
Rt
49.9 +/- 5%
Figure 3A. Recommended Source Termination (where the driver and receiver will be on separate PCBs)
Figure 3B is the recommended termination for applications where a
point-to-point connection can be used. A point-to-point connection
contains both the driver and the receiver on the same PCB. With a
matched termination at the receiver, transmission-line reflections will
be minimized. In addition, a series resistor (Rs) at the driver offers
flexibility and can help dampen unwanted reflections. The optional
resistor can range from 0Ω to 33Ω. All traces should be 50Ω
impedance single-ended or 100Ω differential.
0.5" Max
L1
L1
PCI Expres s
D rive r
Rs
0 to 33
0 to 33
0-18"
L2
L2
Rt
0-0.2"
L3
L3
49.9 +/- 5%
Figure 3B. Recommended Termination (where a point-to-point connection can be used)
ICS841N254AKI REVISION A APRIL 18, 2011
14
©2011 Integrated Device Technology, Inc.