ICS841N254I Datasheet, PDF (10/23 Pages) Integrated Device Technology – FEMTOCLOCK® NG Crystal-to-LVDS/HCSL Clock Synthesizer

ICS841N254I Data Sheet
FEMTOCLOCK® NG CRYSTAL-TO-LVDS/HCSL CLOCK SYNTHESIZER
Parameter Measurement Information, continued
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS Phase Jitter
nQA[0:1]
QA[0:1]
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
LVDS Output Duty Cycle/Pulse Width/Period
nQx
Qx
nQy
Qy
t sk(o)
Output Skew
nQX0
QX1
nQX0
QX1
t sk(b)
Where X = Bank A or Bank B
Bank Skew
+150mV
VRB = +100mV
0.0V
VRB = -100mV
-150mV
Q - nQ
T_STABLE
V_RB
V_RB
T_STABLE
Differential Measurement Points for Ringback
0.0V
Q - nQ
Clock Period (Differential)
Positive Duty
Cycle (Differential)
Negative Duty
Cycle (Differential)
Differential Measurement Points for Duty Cycle/Period
ICS841N254AKI REVISION A APRIL 18, 2011
10
©2011 Integrated Device Technology, Inc.