ICS841N254I Datasheet, PDF (19/23 Pages) Integrated Device Technology – FEMTOCLOCK® NG Crystal-to-LVDS/HCSL Clock Synthesizer

ICS841N254I Data Sheet
FEMTOCLOCK® NG CRYSTAL-TO-LVDS/HCSL CLOCK SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 7.
VDD
I_OUT = 17mA
R_REF =
475Ω ± 1%
V_OUT
R_L
50Ω
IC
Figure 7. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50Ω load to ground.
The highest power dissipation occurs when V_DD__MAX.
Power
= (V_{DD_MAX} – V_OUT) * I_OUT, since V_OUT – I_OUT * R_L
= (V_{DD_MAX} – I_OUT * R_L) * I_OUT
= (3.465V – 17mA * 50Ω) * 17mA
Total Power Dissipation per output pair = 44.5mW
ICS841N254AKI REVISION A APRIL 18, 2011
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©2011 Integrated Device Technology, Inc.