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ICS872S480 Datasheet, PDF (4/20 Pages) Integrated Device Technology – Differential-to-HSTL Zero Delay Clock Generator
ICS872S480 Data Sheet
DIFFERENTIAL-TO-HSTL ZERO DELAY CLOCK GENERATOR
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, VDD
Inputs, VI
Outputs, VO
Package Thermal Impedance, θJA
Storage Temperature, TSTG
Rating
4.6V
-0.5V to VDD + 0.5V
-0.5V to VDD + 0.5V
42.7°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, VDD = 3.3V ± 5%, TA = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
VDD
VDDA
IDD
IDDA
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Outputs terminated 50Ω to GND
3.135
VDD –0.25
Typical
3.3
3.3
Maximum
3.465
VDD
275
25
Units
V
V
mA
mA
Table 4B. LVCMOS/LVTTL DC Characteristics, VDD = 3.3V ± 5%, TA = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
VIH
Input High Voltage
VIL
Input Low Voltage
PLL_BYPASS,
IIH
Input
High Current
REF_SEL, VOUT_SEL
OE, FREQ_SEL,
AUTO_SEL
2.2
-0.3
VDD = VIN = 3.465V
VDD = VIN = 3.465V
IIL
Input
Low Current
PLL_BYPASS,
REF_SEL, VOUT_SEL
OE, FREQ_SEL,
AUTO_SEL
VDD = 3.465V, VIN = 0V
VDD = 3.465V, VIN = 0V
-10
-150
Typical
Maximum
VDD + 0.3
0.8
150
10
Units
V
V
µA
µA
µA
µA
ICS872S480BK REVISION A APRIL 19, 2011
4
©2011 Integrated Device Technology, Inc.