8413S12B Datasheet, PDF (32/33 Pages) Integrated Device Technology – HCSL/ LVCMOS Clock Generator

8413S12B Datasheet.
Revision History Sheet
Rev
Table
T7E
T7F - T7G
B
T7H
B
B
T1
C
T4C
T11
C
D
T1
E
Page
2
10
10 - 11
12
13
30 - 33
1
1
30
2
4
7
18
31
23-24
1
2
4
Description of Change
Date
Block Diagram - corrected CLK labeling from pullup to pulldown.
AC Characteristics Table - added RMS Phase Jitter specs. Updated D_J spec for QE
output from 60ps typ. / 100ps max. to 60ps typ. / 85ps max.
AC Characteristics Tables - added RMS Phase Jitter specs.
AC Characteristics Table - updated RMS Phase Jitter max. spec from 0.77ps to 0.96ps;
t_R / t_F QREF max. spec from 1700ps to 1400ps; odc QF and QREF specs from 42% min.
- 58% max. to 45% min. to 55% max.
Added Phase Noise Plot.
Updated Package Information.
6/22/2011
Deleted Cavium process from the General Description and Applications sections, and
change title headers on each page.
3/20/2012
General Description, deleted references to CN6XXX requirements.
Change IDT package information to ICS package information.
3/23/2012
Per Errata NEN-12-04:
Block Diagram - corrected nMR label from Pulldown to Pullup.
Pin Description Table - Pin 62, changed pulldown to pullup, In the Description, changed
‘nQX to go low’ to ‘nQX to go high’.
LVCMOS DC Characteristics Table - I_IH moved nMR pin to spec 10µA max. I_IL moved
nMR pin to spec -150µA min.
Updated Wiring the Differential Input to Accept Single-Ended Levels application note.
Ordering Information Table - deleted tape & reel count.
12/19/2012
Replaced Schematic and text
Re-formatted Pin Assignment. No changes to the pins.
Corrected Block Diagram, and added note.
Pin Description Table - Pin 62, nMR, corrected description.
Deleted “ICS” prefix from the part number throughout the datasheet.
Updated header/footer throughout the datasheet.
Changed part number from 8413S12 to 8413S12B.
Updated header/footer throughout the datasheet.
2/7/2014
1/27/2015
8/18/16
©2016 Integrated Device Technology, Inc
32
Revision E, August 18, 2016