8413S12B Datasheet, PDF (10/33 Pages) Integrated Device Technology – HCSL/ LVCMOS Clock Generator

8413S12B Datasheet.
Table 7E. HCSL AC Characteristics, V_DD = 3.3V ± 5%, V_{DDO_[A:E]} = V_{DDO_F} = 3.3V ± 5%; and
V_DD = 3.3V ± 5%, V_{DDO_G} = V_{DDO_QREF} = 3.3V ± 5% or 2.5V ± 5%, T_A = -40°C to 85°C
Symbol Parameter
Output Configurations
Outputs
Minimum
Typical
QA, nQA
3
QA = QD = 100MHz,
QB = QG = 125MHz,
QB, nQB
3
R_J
Random Jitter
QC = QE = 156.25MHz,
QC, nQC
3
QF = 50MHz,
QD, nQD
3
QREF0 = QREF1 = Disabled
QE, nQE
3
QA, nQA
26
QA = QD = 100MHz,
QB = QG = 125MHz,
QB, nQB
43
D_J
Deterministic Jitter QC = QE = 156.25MHz,
QC, nQC
48
QF = 50MHz,
QD, nQD
32
QREF0 = QREF1 = Disabled
QE, nQE
60
QA, nQA
0.77
QB, nQB
0.75
tjit(Ø)
RMS Phase Jitter,
(Random)
Integration Range:
(12kHz to 20MHz)
QA = QD = 100MHz,
QB = QG = 125MHz,
QC = QE = 156.25MHz,
QF = 50MHz,
QREF0 = QREF1 = Disabled
QC, nQC
QD, nQD
QE, nQE
0.75
0.78
0.76
QF
0.94
QG
0.88
Maximum
4
4
5
5
5
55
90
80
60
85
0.96
0.94
1.00
0.96
0.95
1.09
1.13
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE: Refer to Applications Section for peak-to-peak jitter calculations.
Table 7F. HCSL AC Characteristics, V_DD = 3.3V ± 5%, V_{DDO_[A:E]} = V_{DDO_F} = 3.3V ± 5%; and
V_DD = 3.3V ± 5%, V_{DDO_G} = V_{DDO_QREF} = 3.3V ± 5% or 2.5V ± 5%, T_A = -40°C to 85°C
Symbol Parameter
Output Configurations
Outputs
Minimum
Typical
QA, nQA
3
QA = QB = 100MHz,
QC = QD = QE = 156.25MHz,
QB, nQB
3
R_J
Random Jitter
QF = 50MHz,
QC, nQC
3
QG = 125MHz,
QD, nQD
3
QREF0 = QREF1 = Disabled
QE, nQE
3
QA, nQA
33
QA = QB = 100MHz,
QC = QD = QE = 156.25MHz,
QB, nQB
27
D_J
Deterministic Jitter QF = 50MHz,
QC, nQC
62
QG = 125MHz,
QD, nQD
61
QREF0 = QREF1 = Disabled
QE, nQE
62
QA, nQA
0.67
QB, nQB
0.68
tjit(Ø)
RMS Phase Jitter,
(Random)
Integration Range:
(12kHz to 20MHz)
QA = QB = 100MHz,
QC = QD = QE = 156.25MHz,
QF = 50MHz,
QG = 125MHz,
QREF0 = QREF1 = Disabled
QC, nQC
QD, nQD
QE, nQE
0.70
0.75
0.76
QF
0.93
QG
0.88
For NOTES, see Table 7E above.
Maximum
4
4
5
6
5
65
60
100
110
100
0.80
0.82
0.92
0.89
0.91
1.07
1.01
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
©2016 Integrated Device Technology, Inc
10
Revision E, August 18, 2016