8413S12B Datasheet, PDF (28/33 Pages) Integrated Device Technology – HCSL/ LVCMOS Clock Generator

3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 9.
VDD
I_OUT = 17mA
8413S12B Datasheet.
R_REF =
475 ± 1%
V_OUT
R_L
50
IC
Figure 9. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate on-chip output power dissipation due
to the loading, use the following equations which assume a 50 load to ground.
The highest power dissipation occurs when V_DD__MAX.
Power = (V_{DD_MAX} – V_OUT) * I_OUT
since V_OUT = I_OUT * R_L
Power = (V_{DD_MAX} – I_OUT * R_L) * I_OUT
= (3.465V – 17mA * 50) * 17mA
Total Power Dissipation per output pair = 44.5mW
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Revision E, August 18, 2016