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ICS813078I Datasheet, PDF (21/26 Pages) Integrated Device Technology – FEMTOCLOCKS™ VCXO-PLL FREQUENCY GENERATOR FOR WIRELESS INFRASTRUCTURE EQUIPMENT
ICS813078I
FEMTOCLOCKS™ VCXO-PLL FREQUENCY GENERATOR
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS813078I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS813078I is the sum of the core power plus the power dissipated in the load(s). The following is the
power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
Core and LVPECL Output Power Dissipation
• Power (core)_MAX = VCC_MAX *IEE_MAX = 3.465V * 260mA = 900.9mW
Power (output)_MAX = 30mW/Loaded Output Pair
If all outputs are loaded, the total power is 5 * 30mW = 150mW
LVCMOS Output Power Dissipation
• Output Impedance ROUT Power Dissipation due to Loading 50Ω to VCCO/2
Output Current IOUT = VCCO_MAX / [2 * (50Ω + ROUT)] = 3.465V / [2 * (50Ω + 15Ω)] = 26.7mA
• Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)2 = 15Ω * (26.7mA)2 = 10.7mW per output
• Total Power Dissipation on the ROUT
Total Power (ROUT) = 10.7mW * 4 = 42.8mW
• Dynamic Power Dissipation at 153.6MHz
Power (25MHz) = CPD * Frequency * (VCCO)2 = 10pF * 153.6MHz * (3.465V)2 = 18mW per output
Total Power (153.6MHz) = 18mW * 4 = 72mW
Total Power Dissipation
• Total Power
= Power (core) + Power (LVPECL output) + Total Power (ROUT) + Total Power (153.6MHz)
= 900.9mW + 150mW + 42.8mW + 72mW
= 1165.7mW
FEMTOCLOCKS™ VCXO-PLL FREQUENCY GENERATOR
21
ICS813078BYI REV. A OCTOBER 6, 2008