ICS1894-40 Datasheet, PDF (15/52 Pages) Integrated Device Technology – 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
Register Map
PHYCEIVER
Register Address
0
1
2,3
4
5
6
7
8
9 through 15
16 through 31
Register Name
Control
Status
PHY Identifier
Auto-Negotiation Advertisement
Auto-Negotiation Link Partner Ability
Auto-Negotiation Expansion
Auto-Negotiation Next Page Transmit
Auto-Negotiation Next Page Link Partner Ability
Reserved by IEEE
Vendor-Specific (ICS) Registers
Basic / Extended
Basic
Basic
Extended
Extended
Extended
Extended
Extended
Extended
Extended
Extended
Register Description
Bit
Definition
When Bit = 0
When Bit = 1
Register 0h - Control
0.15 Reset
No effect
ICS1893CF enters Reset
mode
0.14 Loopback enable
0.13 Speed select¹
Disable Loopback mode Enable Loopback mode
10 Mbps operation
100 Mbps operation
0.12 Auto-Negotiation enable Disable Auto-Negotiation Enable Auto-Negotiation
0.11 Low-power mode
Normal power mode
Low-power mode
0.10 Isolate
No effect
Isolate ICS1893CF from
MII
0.9
Auto-Negotiation restart No effect
Restart Auto-Negotiation
0.8
Duplex mode¹
Half-duplex operation Full-duplex operation
0.7
Collision test
No effect
Enable collision test
0.6
IEEE reserved
Always 0
N/A
0.5
IEEE reserved
Always 0
N/A
0.4
IEEE reserved
Always 0
N/A
Ac-
cess
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
SF De- Hex
fault
SC 0
3
–
0
–
1
–
1
–
0 0/4†
– 0/1†
SC 0
–
0
–
0
0
– 0‡
– 0‡
– 0‡
IDT™ / ICS™ 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 15
ICS1894-40 REV C 092909