9DBV0441 Datasheet, PDF (12/17 Pages) Integrated Circuit Systems – 53mW typical power consumption in PLL mode

9DBV0441 DATASHEET
SMBus Table: Output Enable Register ¹
Byte 0
Name
Control Function
Type
0
Bit 7
Reserved
Bit 6
DIF OE3
Output Enable
RW
Low/Low
Bit 5
DIF OE2
Output Enable
RW
Low/Low
Bit 4
Reserved
Bit 3
DIF OE1
Output Enable
RW
Low/Low
Bit 2
Reserved
Bit 1
DIF OE0
Output Enable
RW
Low/Low
Bit 0
Reserved
1. A low on these bits will overide the OE# pin and force the differential output Low/Low
1
Enabled
Enabled
Enabled
Enabled
Default
1
1
1
1
1
1
1
1
SMBus Table: PLL Operating Mode and Output Amplitude Control Register
Byte 1
Name
Control Function
Type
0
1
Bit 7
Bit 6
Bit 5
PLLMODERB1
PLLMODERB0
PLLMODE_SWCNTRL
PLL Mode Readback Bit 1
R
PLL Mode Readback Bit 0
R
Enable SW control of PLL Mode RW
See PLL Operating Mode Table
Values in B1[7:6] Values in B1[4:3]
set PLL Mode
set PLL Mode
Bit 4
PLLMODE1
PLL Mode Control Bit 1
Bit 3
PLLMODE0
PLL Mode Control Bit 0
Bit 2
Reserved
Bit 1
Bit 0
AMPLITUDE 1
AMPLITUDE 0
Controls Output Amplitude
1. B1[5] must be set to a 1 for these bits to have any effect on the part.
RW¹
RW¹
RW
RW
See PLL Operating Mode Table
00 = 0.6V
10= 0.8V
01 = 0.7V
11 = 0.9V
Default
Latch
Latch
0
0
0
1
1
0
SMBus Table: DIF Slew Rate Control Register
Byte 2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SLEWRATESEL DIF3
SLEWRATESEL DIF2
SLEWRATESEL DIF1
SLEWRATESEL DIF0
Control Function
Reserved
Slew Rate Selection
Slew Rate Selection
Reserved
Slew Rate Selection
Reserved
Slew Rate Selection
Reserved
Type
RW
RW
RW
RW
0
2 V/ns
2 V/ns
2 V/ns
2 V/ns
1
3 V/ns
3 V/ns
3 V/ns
3 V/ns
Default
1
1
1
1
1
1
1
1
SMBus Table: Frequency Select Control Register
Byte 3
Bit 7
Bit 6
Bit 5
Name
FREQ_SEL_EN
Control Function
Reserved
Reserved
Enable SW selection of
frequency
Bit 4
FSEL1
Freq. Select Bit 1
Bit 3
FSEL0
Freq. Select Bit 0
Bit 2
Reserved
Bit 1
Reserved
Bit 0
SLEWRATESEL FB
Adjust Slew Rate of FB
1. B3[5] must be set to a 1 for these bits to have any effect on the part.
Type
RW
RW¹
RW¹
RW
0
1
SW frequency
change disabled
SW frequency
change enabled
See Frequency Select Table
2V/ns
3V/ns
Default
1
1
0
0
0
1
1
1
Byte 4 is Reserved and reads back 'hFF
4 O/P 1.8V PCIE GEN1-2-3 ZDB/FOB W/ZO=100OHM
12
REVISION E 04/28/16