ICS8305I Datasheet, PDF (11/16 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

ICS8305I
LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/
LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER
DIFFERENTIAL CLOCK INPUT INTERFACE
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V_SWING and V_OH must mee
the V_PP and V_CMR input requirements. Figures 3A to 3E show
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 3A, the input termination applies for LVHSTL
drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
1.8V
Zo = 50 Ohm
Zo = 50 Ohm
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V
CLK
nCLK _HiPerClockS
Input
R1
R2
50
50
FIGURE 3A. CLK/NCLK INPUT DRIVEN BY
LVHSTL DRIVER
3.3V
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
3.3V
CLK
nCLK _HiPerClockS
Input
R1
R2
50
50
R3
50
FIGURE 3B. CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
3.3V
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
3.3V
R3
R4
125
125
3.3V
CLK
nCLK _HiPerClockS
Input
R1
R2
84
84
3.3V
Zo = 50 Ohm
LVDS_Driv er
R1
100
Zo = 50 Ohm
3.3V
CLK
nCLK _{Receiv er}
FIGURE 3C. CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
FIGURE 3D. CLK/NCLK INPUT DRIVEN BY
3.3V LVDS DRIVER
3.3V
LVPECL
Zo = 50 Ohm
Zo = 50 Ohm
3.3V
R3
R4
125
125
C1
C2
R5
100 - 200
R6
100 - 200
R1
R2
84
84
3.3V
CLK
nCLK _HiPerClockS
Input
R5,R6 locate near the driver pin.
FIGURE 3E. CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER WITH AC COUPLE
8305AGI
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11
REV. B SEPTEMBER 17, 2012