954226 Datasheet, PDF (10/22 Pages) Integrated Device Technology – Programmable Timing Control HubTM for Mobile P4TM Systems

954226
Programmable Timing Control Hub^TM for Mobile P4^TM Systems
SMBus Table: Output Control Register
Byte 4
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
REF_1 Enable
96MHz
REF_0 STRENGTH
PCI_F1
PCI_F0
CPUCLK2_ITP
CPUCLK1
CPUCLK0
Control
Function
Output Enable
Driven in PD
Strength Programming
Allow assertion of
PCI_STOP# or setting of
Allow assertion of
CPU_STOP# to stop
CPUCLK outputs
Type
RW
RW
RW
RW
RW
RW
RW
RW
SMBus Table: Output Control Register
Byte 5
Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
-
PCI_STOP Drive Mode
-
CPUCLK2_ITP_STOP Drive
Mode
-
CPUCLK1_STOP Drive
Mode
-
CPUCLK0_STOP Drive
Mode
Control
Function
Driven in PCI_STOP#
Driven in CPU_STOP#
Bit 3
-
PCIEX (6:0) Drive Mode
Bit 2
Bit 1
-
CPUCLK2_ITP_PD Drive _{Driven in Powerdown (PD)}
Mode
-
CPUCLK[1:0] PD Drive
Mode
Bit 0
-
ITP_EN
PCIEX/CPU_ITP select
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Driven
1X
Free Running
Free Running
Free Running
Free Running
Free Running
0
Driven
Driven
Driven
Driven
Driven
Driven
Driven
PCIEX
1
Enable
Hi-Z
2X
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
1
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
CPU_ITP
PWD
1
1
1
0
0
1
1
1
PWD
0
0
0
0
0
0
0
latch
SMBus Table: Output Control Register
Byte 6
Pin #
Name
Bit 7
-
SS4
Bit 6
-
SS3
Bit 5
-
SS2
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
SS1
SS0
FSLC
FSLB
FSLA
SMBus Table: Vendor & Revision ID Register
Byte 7
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
Control
Function
LCDCLK Spread Prog Bit 4
Type
RW
0
96Mhz
1
100Mhz
PWD
0
LCDCLK Spread Prog Bit 3 RW
1
LCDCLK Spread Prog Bit 2
LCDCLK Spread Prog Bit 1
LCDCLK Spread Prog Bit 0
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
RW
See Table 2: LCDCLK Freq Sel
0
RW
0
RW
0
RW
Latched
RW
See Table 1: PLL1 Frequency Selection
Table
Latched
RW
Latched
Control
Function
Type
0
R
-
REVISION ID
R
-
R
-
R
-
R
-
VENDOR ID
R
-
R
-
R
-
1
PWD
-
x
-
x
-
x
-
x
-
0
-
0
-
0
-
1
IDT^® Programmable Timing Control Hub^TM for Mobile P4^TM Systems
10
0930A—04/13/10