ICS951413 Datasheet, PDF (9/23 Pages) Integrated Circuit Systems – Programmable System Clock Chip for ATI RS400 P4-based Systems

Integrated
Circuit
Systems, Inc.
ICS951413
SMBus Table: Frequency Select Register
Byte 0 Pin #
Name
Control Function Type
0
1
PWD
Bit 7
-
Latched Input or SMBus
Latched
FS Source
Frequency Select
RW _Inputs
SMBus
0
Bit 6
-
CPU FS3
(SS_EN)
CPU Freq Select Bit3
(Spread Enable)
RW
OFF
ON
Bit 5
-
Reserved
Reserved
RW Reserved Reserved
Bit 4
-
CK410#
CPU Freq Select Bit 4 RW
Bit 3
-
Bit 2
-
Reserved
CPU FS_C
Reserved
RW
CPU Freq Select Bit 2 RW
See Table 1: CPU
Frequency Selection
Bit 1
-
CPU FS_B
CPU Freq Select Bit 1 RW
Table
Bit 0
-
CPU FS_A
CPU Freq Select Bit 0 RW
NOTE: Byte 5 Bit 4 must also set to "1" in order to enable spread for SRC and ATIG clocks
0
X
Latched
0
Latched
Latched
Latched
SMBus Table: Output Control Register
Byte 1 Pin #
Name
Bit 7
50
PCICLK0
Bit 6
41,40
CPUCLK2
Bit 5
4
USB_48MHz
Bit 4
54
REF0
Bit 3
53
REF1
Bit 2
52
REF2
Bit 1
47,46
CPUCLK0
Bit 0
43,42
CPUCLK1
Control Function
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1
SMBus Table: CLKREQB# Output Control Register
Byte 2 Pin #
Name
Control Function Type
0
1
Bit 7
12,13
REQBSRC7
CLKREQB# Controls _RW Does not
SRC7
control
Controls
Bit 6
16,17
REQBSRC6
CLKREQB# Controls _RW Does not
SRC6
control
Controls
Bit 5
18,19
REQBSRC5
CLKREQB# Controls _RW Does not
SRC5
control
Controls
Bit 4
22,23
REQBSRC4
CLKREQB# Controls _RW Does not
SRC4
control
Controls
Bit 3
24,25
REQBSRC3
CLKREQB# Controls
SRC3
RW
Does not
control
Controls
Bit 2
47,46
0 = CPU is free-run
CPU0_Stop_En 1 = CPU is stopped by RW Free-Run Stoppable
CPU_STOP#
Bit 1
-
Reserved
RW Reserved Reserved
Bit 0
34,33
REQBSRC0
CLKREQB# Controls
Does not
SRC0
RW _control
Controls
NOTE: CPU0_Stop_En (Byte2, bit 2) only exists in devices with REV ID = 2 or higher
PWD
0
0
0
0
0
1
X
0
0929C—03/07/05
9