ICS951413 Datasheet, PDF (2/23 Pages) Integrated Circuit Systems – Programmable System Clock Chip for ATI RS400 P4-based Systems

Integrated
Circuit
Systems, Inc.
ICS951413
Pin Description
PIN #
1
2
3
4
5
PIN NAME
X1
X2
VDD48
USB_48MHz
GND
6
VTT_PWRGD#/PD
7
SCLK
8
SDATA
9
**FS_C
10 **CLKREQA#
11 **CLKREQB#
12 SRCCLKT7
13 SRCCLKC7
14 VDDSRC
15 GNDSRC
16 SRCCLKT6
17 SRCCLKC6
18 SRCCLKT5
19 SRCCLKC5
20 GNDSRC
21 VDDSRC
22 SRCCLKT4
23 SRCCLKC4
24 SRCCLKT3
25 SRCCLKC3
26 GNDSRC
27 ATIGCLKT1
28 ATIGCLKC1
PIN
TYPE
DESCRIPTION
IN Crystal input, Nominally 14.318MHz.
OUT Crystal output, Nominally 14.318MHz
PWR Power pin for the 48MHz output.3.3V
OUT 48.00MHz USB clock
PWR Ground pin.
Vtt_PwrGd# is an active low input used to determine when latched inputs
IN ^{are ready to be sampled. PD is an asynchronous active high input pin}
used to put the device into a low power state. The internal clocks, PLLs
and the crystal oscillator are stopped.
IN Clock pin of SMBus circuitry, 5V tolerant.
I/O Data pin for SMBus circuitry, 5V tolerant.
IN Frequency select latch input pin
Dynamic Over Clocking pin: real time frequency selection 0: Normal; 1:
Frequency will transition to a preprogrammed value in the I2c. / Output
IN enable for PCI Express (SRC) outputs. SMBus selects which outputs are
controlled.
0 = enabled, 1 = tri-stated
Dynamic Over Clocking pin: real time frequency selection 0: Normal; 1:
Frequency will transition to a preprogrammed value in the I2c. / Output
IN enable for PCI Express (SRC) outputs. SMBus selects which outputs are
controlled.
0 = enabled, 1 = tri-stated
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
PWR Supply for SRC clocks, 3.3V nominal
PWR Ground pin for the SRC outputs
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
PWR Ground pin for the SRC outputs
PWR Supply for SRC clocks, 3.3V nominal
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
PWR Ground pin for the SRC outputs
OUT True clock of differential SRC clock pair.
OUT Complementary clock of differential SRC clock pair.
0929C—03/07/05
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