ICSSSTUB32872A Datasheet, PDF(5/18 Page) Integrated Circuit Systems – 28-Bit Registered Buffer for DDR2

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ICSSSTUB32872A Datasheet, PDF (5/18 Pages) Integrated Circuit Systems – 28-Bit Registered Buffer for DDR2

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ICSSSTUB32872A

Advance Information

Block Diagram

VREF

PARIN

D0

D21

DCS0

DCS1

DCKE0,

2

DCKE1

DODT0,

2

DODT1

RESET

CK

CK

(CS ACTIVE)

DQ

R

PARITY

GENERATOR

22

AND

CHECKER

DQ

R

DQ

R

DQ

R

DQ

R

2

DQ

R

2

DQ

R

PTYERR

Q0

Q21

QCS0

QCS1

QCKE0,

QCKE1

QODT0,

QODT1

1222Fâ3/13/07

5

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