ICS843034 Datasheet, PDF (5/23 Pages) Integrated Circuit Systems – MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843034
FEMTOCLOCKS™
MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Number
Name
Type
Description
37
CLK
Input Pulldown Non-inverting differential clock input.
38
nCLK
Input
Pullup/
Pulldown
Inverting differential clock input.V_CC/2 default when left floating.
Parallel load input. Determines when data present at M8:M0 is
39
nP_LOAD
Input
Pulldown
loaded into M divider, and when data present at NA2:NA0 and
NB2:NB0 is loaded into the N output dividers.
LVCMOS/LVTTL interface levels.
40
VCO_SEL
Input
Pullup
Determines whether synthesizer is in PLL or bypass mode.
LVCMOS/LVTTL interface levels.
46
M5
Input
Pullup
M divider inputs. Data latched on LOW-to-HIGH transition
of nP_LOAD input. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
C_PD
R
PULLUP
R_PULLDOWN
R_OUT
Parameter
Input Capacitance
Power Dissipation
Capacitance
REF_CLK
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance REF_CLK
Test Conditions
V_CC, V_CCA, V_{CCO_REF} = 3.465V
Minimum Typical Maximum Units
4
pF
TBD
pF
51
kΩ
51
kΩ
5
7
12
Ω
843034AY
www.icst.com/products/hiperclocks.html
5
REV. A JULY 25, 2005