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ICS843034 Datasheet, PDF (11/23 Pages) Integrated Circuit Systems – MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843034
FEMTOCLOCKS™
MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
TABLE
7C.
AC
CHARACTERISTICS,
V
CC
=
V
CCA
=
3.3V±5%,
V
CCO_A
=
3.3V±5%,
V
CCO_B
=
2.5V±5%,TA
=
0°C
TO
70°C
OR
VCC = VCCA = 3.3V±5%, VCCO_A = 2.5V±5%, VCCO_B = 3.3V±5%,TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical
FOUT
tjit(Ø)
Output Frequency
Phase Jitter, RMS (Random);
NOTE 1, 2
333.33MHz,
Integration Range:
12kHz - 20MHz
35
TBD
tjit(cc) Cycle-to-Cycle Jitter; NOTE 3, 4
TBD
tsk(o) Output Skew; NOTE 2, 4, 5
Measured @ the same
Output Frequency
50
t /t
RF
Output
LVPECL Outputs
Rise/Fall Time REF_CLK
20% to 80%
200
M, N to nP_LOAD
5
tS
Setup Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
M, N to nP_LOAD
5
tH
Hold Time
S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
odc
Output Duty Cycle
50
tLOCK
PLL Lock Time
See Parameter Measurement Information section.
NOTE 1: Please refer to the Phase Noise Plot.
NOTE 2: Characterized with REF_CLK output disabled.
NOTE 3: Jitter perforance using XTAL inputs.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
Maximum
750
700
1
Units
MHz
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
%
ms
843034AY
www.icst.com/products/hiperclocks.html
11
REV. A JULY 25, 2005