ICS9FG104 Datasheet, PDF (13/15 Pages) Integrated Circuit Systems – Programmable FTG for Differential P4TM CPU, PCI-Express & SATA Clocks

Integrated
Circuit
Systems, Inc.
ICS9FG104
N
INDEX
AREA
12
D
e
b
c
E1 E
h x 45°
A
A1
-C-
SEATING
PLANE
.10 (.004) C
L
α
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
N
α
5.3 mm. Body, 0.65 mm. Pitch SSOP
(204mil) (25.6 mil)
In Millimeters
In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
MIN
MAX
MIN
MAX
--
2.00
--
.079
0.05
--
.002
--
1.65
1.85
.065
.073
0.22
0.38
.009
.015
0.09
0.25
.0035
.010
SEE VARIATIONS
SEE VARIATIONS
7.40
8.20
.291
.323
5.00
5.60
.197
.220
0.65 BASIC
0.0256 BASIC
0.55
0.95
.022
.037
SEE VARIATIONS
SEE VARIATIONS
0°
8°
0°
8°
VARIATIONS
N
28
D mm.
MIN
MAX
9.90
10.50
D (inch)
MIN
MAX
.390
.413
Reference Doc.: JEDEC Publication 95, MO-150
Ordering Information
ICS9FG104yFLFT
Example:
ICS XXXX y F - LF T
Designation for tape and reel packaging
RoHS Compliant (Optional)
Package Type
F = SSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 to 7 digit numbers)
Prefix
ICS, AV = Standard Device
0839D—06/02/05
13