ICS9250-28 Datasheet, PDF (13/17 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

ICS9250-28
Group Skews (CPU 133 MHz, SDRAM 133MHz)
T_A = 0 - 70º C; V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
CPU to SDRAM
Skew¹
Skew Window¹
T_{sk3 CPU-SDRAM}
T_{w3 CPU-SDRAM}
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU to 3V66
Skew¹
Skew Window¹
T_{sk3 CPU-3V66}
T_{w3 CPU-3V66}
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM to 3V66
Skew^{1 T}sk3 SDRAM-3V66
Skew Window^{1 T}w3 SDRAM-3V66
SDRAM, 3V66 @ 1.5 V
3V66 to PCI
Skew¹
Skew Window¹
T_{sk3 3V66-PCI}
T_{w3 3V66-PCI}
3V66, PCI @ 1.5 V
IOAPIC to PCI
Skew¹
Skew Window¹
T_{sk3 IOAPIC-PCI}
T_{w3 IOAPIC-PCI}
IOAPIC @ 1.25 V, PCI @ 1.5 V
1_{Guaranteed by design, not 100% tested in production.}
MIN
3.25
0
-500
0
-3.25
0
1.5
0
-1
0
TYP
3.45
155
120
120
-3.08
175
2.2
80
-0.1
0
MAX
4.25
500
500
500
-4.25
500
3.5
500
1
1
UNITS
ns
ps
ps
ps
ps
ps
ns
ps
ns
ns
Group Skews (CPU133 MHz, SDRAM 100MHz)
T_A = 0 - 70º C; V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
CPU to SDRAM
Skew^{1 T}sk3 CPU-SDRAM ^{CPU @ 1.25 V, SDRAM @ 1.5 V}
Skew Window^{1 T}w3 CPU-SDRAM
CPU to 3V66
Skew^{1 T}sk3 CPU-3V66
CPU @ 1.25 V, 3V66 @ 1.5 V
Skew Window^{1 T}w3 CPU-3V66
SDRAM to 3V66
Skew^{1 T}sk3 SDRAM-3V66
SDRAM, 3V66 @ 1.5 V
Skew Window^{1 T}w3 SDRAM-3V66
3V66 to PCI
Skew^{1 T}sk3 3V66-PCI
3V66, PCI @ 1.5 V
Skew Window^{1 T}w3 3V66-PCI
IOAPIC to PCI
Skew^{1 T}sk3 IOAPIC-PCI ^{IOAPIC @ 1.25 V, PCI @ 1.5 V}
Skew Window^{1 T}w3 IOAPIC-PCI
1_{Guaranteed by design, not 100% tested in production.}
MIN
-500
0
-500
0
-500
0
1.5
0
-1
0
TYP MAX UNITS
-15 500 ps
165 500 ps
165 500 ps
105 500 ps
185 500 ps
185 500 ps
2.2 3.5 ns
60 500 ps
-0.1
1
ns
0
1
ns
13