ICS9250-28 Datasheet, PDF (12/17 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

ICS9250-28
Group Skews (CPU 66 MHz, SDRAM 100MHz)
T_A = 0 - 70º C; V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
CPU to SDRAM
Skew¹
Skew Window¹
T_{sk1 CPU-SDRAM}
T_{w1 CPU-SDRAM}
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU to 3V66
Skew¹
Skew Window¹
T_{sk1 CPU-3V66}
T_{w1 CPU-3V66}
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM to 3V66
Skew^{1 T}sk1 SDRAM-3V66
Skew Window^{1 T}w1 SDRAM-3V66
SDRAM, 3V66 @ 1.5 V
3V66 to PCI
Skew¹
Skew Window¹
T_{sk1 3V66-PCI}
T_{w1 3V66-PCI}
3V66, PCI @ 1.5 V
IOAPIC to PCI
Skew¹
Skew Window¹
T_{sk1 IOAPIC-PCI}
T_{w1 IOAPIC-PCI}
IOAPIC @ 1.25 V, PCI @ 1.5 V
1_{Guaranteed by design, not 100% tested in production.}
MIN
-3
0
7
0
-500
0
1.5
0
-1
0
TYP MAX UNITS
-2.7 -2
ns
165 500 ps
7.6
8
ns
105 500 ps
180 500 ps
210 500 ps
2.1 3.5 ns
90 500 ps
-0.1
1
ns
0
1
ns
Group Skews (CPU 100 MHz, SDRAM 100MHz)
T_A = 0 - 70º C; V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
CPU to SDRAM
Skew¹
Skew Window¹
T_{sk2 CPU-SDRAM}
T_{w2 CPU-SDRAM}
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU to 3V66
Skew¹
Skew Window¹
T_{sk2 CPU-3V66}
T_{w2 CPU-3V66}
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM to 3V66
Skew^{1 T}sk2 SDRAM-3V66
Skew Window^{1 T}w2 SDRAM-3V66
SDRAM, 3V66 @ 1.5 V
3V66 to PCI
Skew¹
Skew Window¹
T_{sk2 3V66-PCI}
T_{w2 3V66-PCI}
3V66, PCI @ 1.5 V
IOAPIC to PCI
Skew¹
Skew Window¹
T_{sk2 IOAPIC-PCI}
T_{w2 IOAPIC-PCI}
IOAPIC @ 1.25 V, PCI @ 1.5 V
1_{Guaranteed by design, not 100% tested in production.}
MIN
4.5
0
4.5
0
-500
0
1.5
0
-1
0
TYP MAX UNITS
4.9 5.5 ns
180 500 ps
5
5.5 ns
100 500 ps
175 500 ps
200 500 ps
2.1 3.5 ns
90 500 ps
-0.1
1
ns
0
1
ns
12