IC42S81600 Datasheet, PDF (51/69 Pages) Integrated Circuit Solution Inc – 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM

IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
Read and Write Cycle (2 of 2)
CLK
CKE
Burst Length=4, CAS Latency=3
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
tCK3
CS
RAS
CAS
WE
*BS0
A10
RAa
ADD
RAa
CAa
CAb
CAc
DQM
Hi-Z
DQ
QAa0 QAa1 QAa2 QAa3
DAb0 DAb1
DAb3
QAc0 QAc1
QAc3
Activate
Command
Bank A
Read
Command
Bank A
BS1=”L”, Bank C,D = Idle
Integrated Circuit Solution Inc.
DR023-0E 6/11/2004
Write _{The Write Data}
Command
Bank A
is
Masked
with
a
Zero Clock
Latency
Read
Command
Bank A
The Read Data
is Masked with
Two Clock
Latency
51